IP Library Granted Patent US 8,627,035
Granted Patent B2
US 8,627,035 · App. 13/184,939 · Granted Jan 7, 2014

Dynamic storage tiering

Inventors: Gopakumar Ambat (Bangalore, IN); Vishwanath Nagalingappa Hawargi (Bangalore, IN); Yask Sharma (Bangalore, IN)
Assignee: LSI Corporation
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Quick Facts
Patent No.
US 8,627,035
App. No.
13/184,939
Granted
Jan 7, 2014
Kind
B2
Abstract

A method for dynamic storage tiering may include, but is not limited to: receiving an input/output (I/O) request from a host device; determining whether the I/O request results in a cache hit; and relocating data associated with the I/O request between a higher-performance storage device and lower-performance storage device according to the determination whether the data associated with the I/O request is stored in a cache.

Claims (38)

1. A method for dynamic storage tiering comprising:

receiving an input/output (I/O) request from a host device;

determining whether the I/O request results in a cache hit;

comparing at least one of a number of cache hits associated with data associated with the I/O request or a frequency of cache hits associated with data associated with the I/O request to a threshold range; and

relocating data associated with the I/O request between a higher-performance storage device and lower-performance storage device according to a comparison of at least one of a number of cache hits associated with data associated with the I/O request or a frequency of cache hits associated with data associated with the I/O request to a threshold range.

2. The method of claim 1 , wherein the data associated with the I/O request comprises logical block address (LBA)-level data.

3. The method of claim 2 ,

wherein the determining whether the I/O request results in a cache hit further comprises:

applying a weighting to a first LBA range according to cache hit data associated with the first LBA range; and

applying a weighting to a second LBA range according to cache hit data associated with the second LBA range, and

wherein the relocating data associated with the I/O request between a higher-performance storage device and lower-performance storage device according to a comparison of at least one of a number of cache hits associated with data associated with the I/O request or a frequency of cache hits associated with data associated with the I/O request to a threshold range further comprises:

relocating either the first LBA range or the second LBA range according to relative weightings of the first LBA range and the second LBA range.

4. The method of claim 3 , wherein the first LBA range is adjacent to the second LBA range.

5. The method of claim 3 , wherein a weighting is a function of at least one of: a cache hit count associated with the LBA range; a cache hit time; a cache hit frequency; or a cache hit count associated with a second LBA range adjacent to the LBA range.

6. The method of claim 1 , further comprising:

receiving a user input;

retaining data associated with the I/O request in a present storage location when at least one of a number of cache hits associated with data associated with the I/O request and a frequency of cache hits associated with data associated with the I/O is outside a user-defined threshold range.

7. The method of claim 6 , wherein the user input is indicative of a volume snapshot operation.

8. The method of claim 6 , wherein the present storage location is a lower performance storage location.

9. A system for dynamic storage tiering comprising:

means for receiving an input/output (I/O) request from a host device;

means for determining whether the I/O request results in a cache hit;

means for comparing at least one of a number of cache hits associated with data associated with the I/O request or a frequency of cache hits associated with data associated with the I/O request to a threshold range; and

means for relocating data associated with the I/O request between a higher-performance storage device and lower-performance storage device according to a comparison of at least one of a number of cache hits associated with data associated with the I/O request or a frequency of cache hits associated with data associated with the I/O request to a threshold range.

10. The system of claim 9 , wherein the data associated with the I/O request comprises logical block address (LBA)-level data.

11. The system of claim 10 ,

wherein the means for determining whether the I/O request results in a cache hit further comprises:

means for applying a weighting to a first LBA range according to cache hit data associated with the first LBA range; and

means for applying a weighting to a second LBA range according to cache hit data associated with the second LBA range, and

wherein the means for relocating data associated with the I/O request between a higher-performance storage device and lower-performance storage device according to a comparison of at least one of a number of cache hits associated with data associated with the I/O request or a frequency of cache hits associated with data associated with the I/O request to a threshold range further comprises:

means for relocating either the first LBA range or the second LBA range according to relative weightings of the first LBA range and the second LBA range.

12. The system of claim 11 , wherein the first LBA range is adjacent to the second LBA range.

13. The system of claim 11 , wherein a weighting is a function of at least one of: a cache hit count associated with the LBA range; a cache hit time; a cache hit frequency; or a cache hit count associated with a second LBA range adjacent to the LBA range.

14. The system of claim 9 , further comprising:

means for receiving a user input;

means for retaining data associated with the I/O request in a present storage location when at least one of a number of cache hits associated with data associated with the I/O request and a frequency of cache hits associated with data associated with the I/O is outside a user-defined threshold range.

15. The system of claim 14 , wherein the user input is indicative of a volume snapshot operation.

16. The system of claim 14 , wherein the present storage location is a lower performance storage location.

Assignments (9)
CORRECTIVE ASSIGNMENT TO CORRECT THE ERROR IN RECORDING THE MERGER IN THE INCORRECT US PATENT NO. 8,876,094 PREVIOUSLY RECORDED ON REEL 047351 FRAME 0384. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 8, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 049248/0558 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE OF THE MERGER PREVIOUSLY RECORDED AT REEL: 047230 FRAME: 0910. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047351/0384 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047230/0910 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032856-0031) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: LSI CORPORATION; AGERE SYSTEMS LLC
Reel/Frame 037684/0039 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 3, 2015
From: LSI CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 035390/0388 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: LSI CORPORATION; AGERE SYSTEMS LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032856/0031 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 18, 2011
From: AMBAT, GOPAKUMAR; HAWARGI, VISHWANATH NAGALINGAPPA; SHARMA, YASK
To: LSI CORPORATION
Reel/Frame 026607/0508 →
Continuity (1)
Related Publication 20130024650A1 · Jan 24, 2013