Amplifying circuit
View Patent ↗The first emitter follower circuit and the second emitter follower circuit can increase an input impedance on the side of the inverting input terminal in the amplifying circuit. As a result, when a feedback circuit is connected between the inverting input terminal and the output terminal of the amplifying circuit, a fluctuation in a gain of the amplifying circuit according to a configuration of the feedback circuit can be suppressed.
1. An amplifying circuit comprising:
a first stage amplifying circuit for amplifying a first input signal to be input into an inverting input terminal and a second input signal to be input into a non-inverting input terminal, and for outputting a first stage amplification signal, wherein
the first stage amplifying circuit includes
a first transistor forming a first emitter follower circuit whose input is a positive component of the first input signal, a predetermined first potential being applied to a collector of the first transistor,
a second transistor forming a second emitter follower circuit whose input is a negative component of the first input signal, a predetermined second potential being applied to a collector of the second transistor,
a third transistor forming a third emitter follower circuit whose input is a positive component of the second input signal, a predetermined third potential being applied to a collector of the third transistor,
a fourth transistor forming a fourth emitter follower circuit whose input is a negative component of the second input signal, a predetermined fourth potential being applied to a collector of the fourth transistor,
a fifth transistor having an emitter to be connected to an output of the first emitter follower circuit, a base to be connected to an output of the third emitter follower circuit, and a collector to which an electric potential of a positive power source is applied via a first collector resistor and from which a positive component of the first stage amplification signal is output, and
a sixth transistor having an emitter to be connected to an output of the second emitter follower circuit, a base to be connected to an output of the fourth emitter follower circuit, and a collector to which an electric potential of a negative power source is applied via a second collector resistor and from which a negative component of the first stage amplification signal is output.
2. The amplifying circuit according to claim 1 , wherein
the first stage amplifying circuit further includes
a first resistor to be connected between an emitter of the first transistor and the emitter of the fifth transistor, and
a second resistor to be connected between an emitter of the second transistor and the emitter of the sixth transistor.
3. The amplifying circuit according to claim 2 , wherein
the first stage amplifying circuit further includes
a suppression circuit for suppressing a fluctuation in a potential difference between the base of the fifth transistor and the base of the sixth transistor.
4. The amplifying circuit according to claim 3 , wherein
the suppression circuit includes
a seventh transistor having a base and a collector to be connected to the base of the fifth transistor, and an emitter to be connected to the emitter of the third transistor,
an eighth transistor having a base and a collector to be connected to the base of the sixth transistor, and an emitter to be connected to an emitter of the fourth transistor,
a third resistor to be connected between an emitter of the third transistor and the emitter of the seventh transistor, and
a fourth resistor to be connected between the emitter of the fourth transistor and the emitter of the eighth transistor.
5. The amplifying circuit according to claim 4 , wherein
the suppression circuit further includes
a first capacitor to be connected between the emitter of the third transistor and the seventh transistor in parallel with the third resistor, and
a second capacitor to be connected between the emitter of the fourth transistor and the eighth transistor in parallel with the fourth resistor.
6. The amplifying circuit according to claim 1 , further comprising:
a subsequent stage amplifying circuit for amplifying the first stage amplification signal; and
a buffer circuit for converting an output impedance of the subsequent stage amplifying circuit, wherein
the subsequent stage amplifying circuit includes
a ninth transistor having a collector to be connected to the buffer circuit and forming an emitter grounding amplifier circuit whose input is the positive component of the first stage amplification signal,
a fifth resistor having one end to be connected to the collector of the ninth transistor and the other end to be grounded,
a tenth transistor having a collector to be connected to the buffer circuit and forming an emitter grounding amplifier circuit whose input is a negative component of the first stage amplification signal,
a sixth resistor having one end to be connected to the collector of the tenth transistor and the other end to be grounded.
7. An amplifying circuit comprising:
a first stage amplifying circuit for amplifying a first input signal to be input into an inverting input terminal and a second input signal to be input into a non-inverting input terminal and outputting a first stage amplification signal, wherein
the first stage amplifying circuit includes
a first transistor forming a first emitter follower circuit whose input is a positive component of the second input signal, a predetermined first potential being applied to a collector of the first transistor,
a second transistor forming a second emitter follower circuit whose input is a negative component of the second input signal, a predetermined second potential being applied to a collector of the second transistor,
a third transistor having an emitter to be connected to the emitter of the first transistor,
a fourth transistor having an emitter to be connected to the emitter of the second transistor,
a first resistor connected between a collector of the third transistor and a base of the third transistor,
a second resistor connected between the base of the third transistor and a base of the fourth transistor,
a third resistor connected between a collector of the fourth transistor and the base of the fourth transistor,
a fifth transistor having an emitter to which a positive component of the first input signal is input, a base to be connected to the collector of the third transistor, and a collector to which an electric potential of a positive power source is applied via a first collector resistor and from which a positive component of the first stage amplification signal is output, and
a sixth transistor having an emitter into which a negative component of the first input signal is input, a base to be connected to a collector of the fourth transistor and a collector to which an electric potential of a negative power source is applied via a second collector resistor and from which a negative component of the first stage amplification signal is output.
8. The amplifying circuit according to claim 7 , wherein
the first stage amplifying circuit further includes
a seventh transistor forming a third emitter follower circuit whose input is the positive component of the first input signal, an emitter of the seventh transistor being connected to the emitter of the fifth transistor, a predetermined third potential being applied to a collector of the seventh transistor, and
an eighth transistor forming a fourth emitter follower circuit whose input is the negative component of the first input signal, an emitter of the eighth transistor being connected to the emitter of the sixth transistor, a predetermined fourth potential being applied to a collector of the eighth transistor.
9. The amplifying circuit according to claim 8 , wherein
the first stage amplifying circuit further includes
a fourth resistor to be connected between the emitter of the seventh transistor and the emitter of the fifth transistor, and
a fifth resistor to be connected between the emitter of the eighth transistor and the emitter of the sixth transistor.
10. The amplifying circuit according to claim 7 , further comprising:
a subsequent stage amplifying circuit for amplifying the first stage amplification signal; and
a buffer circuit for converting an output impedance of the subsequent stage amplifying circuit, wherein
the subsequent stage amplifying circuit includes
a ninth transistor having a collector to be connected to the buffer circuit and forming an emitter grounding amplifier circuit whose input is the positive component of the first stage amplification signal,
a sixth resistor having one end to be connected to a collector of the ninth transistor and the other end to be grounded,
a tenth transistor having a collector to be connected to the buffer circuit and forming an emitter grounding amplifier circuit whose input is the negative component of the first stage amplification signal,
a seventh resistor having one end to be connected to a collector of the tenth transistor and the other end to be grounded.