Method and apparatus for maintaining circuit stability
View Patent ↗A control circuit for a transistor arrangement comprises a monitoring arrangement ( 60 ) for monitoring the current flow and voltage across the transistor arrangement ( 50 ) and means ( 62 ) for determining if the current and voltage values define an operating point which falls within a stable operating region. The stable operating region comprises a region having a boundary ( 30 ) which comprises an electro-thermal instability line.
1. A control circuit for a transistor arrangement for implementing protection of the transistor arrangement, comprising:
a monitoring arrangement for monitoring the current flow and voltage across the transistor arrangement; and
means for determining when the current and voltage values define an operating point which falls within a stable operating region,
wherein the stable operating region comprises a region having a boundary is defined by a bipolar transistor collector current stability line I C crit which satisfies:
I
C
crit
=
M
n
V
T
-
M
n
R
eq
-
R
TH
V
eq
φ
,
[
1
]
R
eq
=
R
E
+
R
E
+
R
B
M
n
(
1
β
0
-
(
M
n
-
1
)
)
,
[
2
]
V
eq
=
M
n
V
CB
+
V
BE
(
1
+
1
β
0
)
,
[
3
]
M n =multiplication factor,
V T =thermal voltage (=kT/g),
φ=the temperature dependence of the internal base-emitter voltage,
R E =emitter resistance,
R B =base resistance,
R eq =equivalent resistance of R E and R B ,
β 0 =current gain in absence of avalanche,
V CB =base-collector voltage,
V BE =Base-emitter voltage,
V eq =equivalent voltage of V CB and V BE ,
R TH =thermal resistance [K/W],
wherein the stability line comprises the value of I C crit for different values of base-collector and base-emitter voltages and defines the boundary between electro-thermal stability and instability.
2. A circuit as claimed in claim 1 , wherein the boundary is closer to the origin than a maximum temperature boundary line and a maximum power boundary line in the current-voltage plot for the transistor arrangement.
3. A control circuit as claimed in claim 1 , wherein the monitoring arrangement is further for monitoring the temperature.
4. A control circuit as claimed in claim 1 , wherein the thermal voltage V T is derived from a temperature measurement or a temperature estimate.
5. A control circuit as claimed in claim 1 , further comprising a circuit for controlling the transistor arrangement to prevent the operating point moving outside the stable operating region.
6. A control circuit as claimed in claim 1 , wherein the transistor arrangement comprises an individual bipolar transistor.
7. A control circuit as claimed in claim 1 , wherein the transistor arrangement comprises an emitter coupled pair of bipolar transistors.
8. A method of controlling a transistor arrangement for implementing protection of the transistor arrangement, comprising:
monitoring the current flow and voltage across the transistor arrangement;
determining when the current and voltage values define an operating point which falls within a stable operating region, wherein the stable operating region comprises a region having a boundary; and
controlling the transistor arrangement to prevent the operating point moving outside the stable operating region
wherein the stable operating region boundary is defined by a bipolar transistor collector current stability line I C crit which satisfies:
I
C
crit
=
M
n
V
T
-
M
n
R
eq
-
R
TH
V
eq
φ
,
[
1
]
R
eq
=
R
E
+
R
E
+
R
B
M
n
(
1
β
0
-
(
M
n
-
1
)
)
,
[
2
]
V
eq
=
M
n
V
CB
+
V
BE
(
1
+
1
β
0
)
,
[
3
]
M n =multiplication factor,
V T =thermal voltage (=kT/g),
φ=the temperature dependence of the internal base-emitter voltage,
R E =emitter resistance,
R B =base resistance,
R eq =equivalent resistance of R E and R B ,
β 0 =current gain in absence of avalanche,
V CB =base-collector voltage,
V BE =Base-emitter voltage,
V eq =equivalent voltage of V CB and V BE ,
R TH =thermal resistance [K/W],
wherein the stability line comprises the value of I C crit for different values of base-collector and base-emitter voltages and defines the boundary between electro-thermal stability and instability.
9. A method as claimed in claim 8 , wherein the stable operating region comprises a region having a boundary which is closer to the origin than a maximum temperature boundary line and a maximum power boundary line in the current-voltage plot for the transistor arrangement.
10. A method as claimed in claim 8 , wherein the monitoring further comprises monitoring the temperature.
11. A method as claimed in claim 8 wherein the thermal voltage V T is derived from a temperature measurement or a temperature estimate.
12. A method as claimed in claim 8 , wherein the transistor arrangement comprises an individual bipolar transistor.
13. A method as claimed in claim 8 , wherein the transistor arrangement comprises an emitter coupled pair of bipolar transistors.