Method of selection of an available memory size of a circuit including at least processor and a memory and corresponding program and smart card
View Patent ↗The invention relates to a method for selecting an available memory size of a circuit including at least a CPU and a total memory, the method includes a stage for the selection of an available memory size that is smaller than or equal to that of the total memory. The selection stage is implemented by the manufacturer of the product incorporating the said circuit, different from the circuit manufacturer, and includes a stage for the generation of a configuration signature intended for the circuit manufacturer, which information is representative of the size of available memory size selected in this way by the product manufacturer.
1. A method for configuring an available memory size of an integrated circuit comprising at least a processor and a total memory, the method comprising:
a configuration stage for the configuration of an available memory size smaller than or equal to that of the total memory, wherein the configuration stage is carried out by a circuit user other than the circuit manufacturer, and in that the configuration stage includes:
a stage for selecting the available memory size of the integrated circuit,
a stage for registering and locking the selected available memory size, where such registration is locked permanently, and
a stage for the generation by the integrated circuit of a signature representative of the selected available memory size.
2. The method of configuration according to claim 1 where the configuration stage further comprises a transmission stage where the signature is transmitted via a communications network to a piece of equipment of a circuit manufacturer.
3. An integrated circuit comprising:
a total memory that is configurable so as to obtain an available memory with a size smaller than the total memory, wherein the total memory comprises:
at least one memory zone to indelibly store setting up information that defines the configuration size of the available memory, and
means to generate a signature representative of the configuration of the available memory size.
4. An integrated circuit according to claim 3 , further comprising a communication interface capable of transmitting the signature.
5. An integrated circuit according to claim 4 , further comprising a blocking/unblocking means that blocks normal operation of the integrated circuit until an unblocking command is sent back in response to the sending of the signature.
6. A smart card comprising:
an integrated circuit having:
a total memory that is configurable so as to obtain an available memory with a size smaller than the total memory, wherein the total memory comprises:
at least one memory zone to indelibly store setting up information that defines the configuration size of the available memory, and
means to generate a signature representative of the configuration of the available memory size.
7. The smart card of claim 6 wherein the integrated circuit further comprises a communication interface capable of transmitting the signature.
8. The smart card of claim 7 wherein the integrated circuit further comprises a blocking/unblocking means that blocks normal operation of the integrated circuit until an unblocking command is sent back in response to the sending of the signature.