Image sensor photo mask and apparatus
View Patent ↗A method for fabricating an image sensor includes forming an insulation layer over a substrate in a logic circuit region and a pixel region, forming a photoresist over the insulation layer, patterning the photoresist to form a photoresist pattern where the insulation layer in the pixel region is exposed and the insulation layer in the logic circuit region is not exposed, wherein a thickness of the photoresist pattern is gradually decreased in an interfacial region between the pixel region and the logic circuit region in a direction of the logic circuit region to the pixel region, and performing an etch back process over the insulation layer and the photoresist pattern in conditions that an etch rate of the photoresist pattern are substantially the same as that of the insulation layer.
1. A photo mask for a substrate having a photoresist layer and an insulation layer formed over both a pixel and a logic circuit configured to process signals of the pixel, the photo mask comprising:
a pixel region positioned over the pixel, wherein the pixel region is configured to cause the photoresist layer formed over the pixel to be removed by a development process;
a logic circuit region positioned over the logic circuit, wherein the logic circuit region is configured to cause at least a portion of the photoresist layer formed over the logic circuit to remain after the development process; and
an interfacial region between the pixel region and the logic circuit region, wherein the interfacial region is configured to cause the developing process to decrease a thickness of the photoresist layer in a direction from the logic circuit region to the pixel region at a slope of less than 15 degrees.
2. The photo mask of claim 1 , wherein, during a light exposure process:
the pixel region is configured to expose the photoresist layer to light;
the logic circuit region is configured to shade the photoresist layer from light; and
the interfacial region is configured to increase exposure of the photoresist layer to light in the direction from the logic circuit region to the pixel region.
3. The photo mask of claim 1 , wherein the interfacial region comprises a sawtooth shape having a pitch configured to prevent a transfer of the sawtooth shape to the photoresist layer.
4. The photo mask of claim 1 , wherein:
the interfacial region comprises a plurality of light-penetrating patterns having pitches configured to prevent a transfer of a shape of the light-penetrating patterns to the photoresist layer;
a quantity of the light-penetrating patterns in the interfacial region is fixed; and
a size of the light-penetrating patterns is configured to increase exposure of the photoresist layer to light in the direction from the logic circuit region to the pixel region.
5. The photo mask of claim 1 , wherein:
the interfacial region comprises a plurality of light-penetrating patterns having pitches configured to prevent a transfer of a shape of the light-penetrating patterns to the photoresist layer;
a size of the light-penetrating patterns in the interfacial region is fixed; and
a quantity of light-penetrating patterns is configured to increase exposure of the photoresist layer to light in the direction from the logic circuit region to the pixel region.
6. The photo mask of claim 1 , wherein:
the interfacial region comprises a plurality of light-penetrating patterns having pitches configured to prevent a transfer of a shape of the light-penetrating patterns to the photoresist layer; and
a size and a quantity of the light-penetrating patterns are configured to increase exposure of the photoresist layer to light in the direction from the logic circuit region to the pixel region.
7. An apparatus, comprising:
an image sensor substrate including a pixel region, a logic circuit region, and an interfacial region between the pixel region and the logic circuit region;
an insulation layer over the pixel region, logic circuit region, and interfacial region;
a photoresist layer over the insulation layer; and
a photo mask over the photoresist layer;
wherein the photo mask includes a first region over the pixel region, a second region over the logic circuit region, and a third region over the interfacial region; and
wherein the third region is configured to cause a developing process to decrease a thickness of the photoresist layer in a direction from the logic circuit region to the pixel region at a slope of less than 15 degrees.
8. The apparatus of claim 7 , wherein, during a light exposure process:
the first region is configured to expose the photoresist layer to light;
the second region is configured to shade the photoresist layer from light; and
the third region is configured to increase exposure of the photoresist layer to light in the direction from the logic circuit region to the pixel region.
9. The apparatus of claim 7 , wherein the third region comprises a sawtooth shape having a pitch configured to prevent a transfer of the sawtooth shape to the photoresist layer.
10. The apparatus of claim 7 , wherein:
the third region comprises a plurality of light-penetrating patterns having pitches configured to prevent a transfer of a shape of the light-penetrating patterns to the photoresist layer;
a quantity of the light-penetrating patterns in the third region is fixed; and
a size of the light-penetrating patterns is configured to increase exposure of the photoresist layer to light in the direction from the logic circuit region to the pixel region.
11. The apparatus of claim 7 , wherein:
the third region comprises a plurality of light-penetrating patterns having pitches configured to prevent a transfer of a shape of the light-penetrating patterns to the photoresist layer;
a size of the light-penetrating patterns in the third region is fixed; and
a quantity of light-penetrating patterns is configured to increase exposure of the photoresist layer to light in the direction from the logic circuit region to the pixel region.
12. The apparatus of claim 7 , wherein:
the third region comprises a plurality of light-penetrating patterns having pitches configured to prevent a transfer of a shape of the light-penetrating patterns to the photoresist layer; and
a size and a quantity of the light-penetrating patterns are configured to increase exposure of the photoresist layer to light in the direction from the logic circuit region to the pixel region.
13. A photo mask for a substrate having a photoresist layer, the photo mask comprising:
a first region configured to cause the photoresist layer formed over a pixel to be removed by a development process;
a second region configured to cause at least a portion of the photoresist layer formed over a logic circuit to remain after the development process; and
a third region between the first region and the second region;
wherein the third region is configured to cause the developing process to decrease a thickness of the photoresist layer in a direction from the second region to the first region at a slope of less than 15 degrees.
14. The photo mask of claim 13 , wherein, during a light exposure process:
the first region is configured to expose the photoresist layer to light;
the second region is configured to shade the photoresist layer from light; and
the third region is configured to increase exposure of the photoresist layer to light in the direction from the second region to the first region.
15. The photo mask of claim 13 , wherein the third region comprises a sawtooth shape having a pitch configured to prevent a transfer of the sawtooth shape to the photoresist layer.
16. The photo mask of claim 13 , wherein:
the third region comprises a plurality of light-penetrating patterns having pitches configured to prevent a transfer of a shape of the light-penetrating patterns to the photoresist layer;
a quantity of the light-penetrating patterns in the third region is fixed; and
a size of the light-penetrating patterns is configured to increase exposure of the photoresist layer to light in the direction from the second region to the first region.
17. The photo mask of claim 13 , wherein:
the third region comprises a plurality of light-penetrating patterns having pitches configured to prevent a transfer of a shape of the light-penetrating patterns to the photoresist layer;
a size of the light-penetrating patterns in the third region is fixed; and
a quantity of light-penetrating patterns is configured to increase exposure of the photoresist layer to light in the direction from the second region to the first region.
18. The photo mask of claim 13 , wherein:
the third region comprises a plurality of light-penetrating patterns having pitches configured to prevent a transfer of a shape of the light-penetrating patterns to the photoresist layer; and
a size and a quantity of the light-penetrating patterns are configured to increase exposure of the photoresist layer to light in the direction from the second region to the first region.