Digital two way automatic communication system (TWACS) outbound receiver and method
View Patent ↗A receiver and method for a transponder of a two-way automatic communications system (TWACS) used by an electrical utility in which analog outbound messages are sent from the utility to a consumer and inbound, reply messages are sent from the consumer to the utility. The receiver and method enable a transponder to detect the outbound messages and include A/D conversion and digital processing for demodulating a digitized signal and providing the outbound message.
1. In a two-way automatic communications system (TWACS) used by an electrical utility in which outbound messages are sent from the utility to a consumer and inbound messages are sent from the consumer to the utility, the respective outbound and inbound messages being sent and received over the utility's power distribution system, a receiver for detecting the outbound messages, said receiver comprising:
an analog filter component receiving the analog outbound signal including an outbound message to provide a filtered signal,
an A/D converter component converting the filtered signal to a corresponding digital signal and providing the corresponding digital signal; and
a digital processor executing:
a digital preprocessor component receiving the corresponding digital signal, preprocessing the received corresponding digital signal to provide a preprocessed discretization digital signal; and
a digital symbol determination component receiving the preprocessed discretization digital signal and providing a noise product signal, said digital symbol determination component including a preamble detector providing a symbol synchronization signal corresponding to the preprocessed discretization digital signal, said digital symbol determination component digitally demodulating the received preprocessed discretization digital signal by sampling according to the symbol synchronization signal and according to the noise product signal to provide the outbound message.
2. The receiver of claim 1 wherein the filter component comprises:
a carrier notch filter receiving the analog outbound signal and canceling the carrier signal to provide an analog message signal; and
a low-pass filter (LPF) component receiving the analog outbound signal and filtering the analog outbound signal to provide a filtered analog outbound signal;
and wherein the A/D converter component comprises:
a first A/D converter digitizing the analog message signal into a digital message signal; and
a second A/D converter digitizing the filtered analog outbound signal and providing a digital filtered signal.
3. The receiver of claim 2 wherein the digital processor includes a buffering component comprising:
a buffer receiving the digital message signal and sequentially providing a half-cycle buffered signal corresponding thereto, and
a phase locked loop (PLL) component receiving the digital filtered signal and providing a half-cycle synchronization signal corresponding thereto, said half-cycle synchronization signal sampling the half-cycle buffered signal to provide a corresponding digital signal.
4. The receiver of claim 3 wherein the digital preprocessor component comprises:
a fast Fourier transform (FFT) component receiving the corresponding digital signal and providing a frequency domain signal corresponding to the digital signal; and
a dimension reduction component connected to the FFT component for receiving the frequency domain signal, said dimension reduction component providing the preprocessed discretization digital signal corresponding to the received corresponding digital signal.
5. The receiver of claim 4 further comprising a finite impulse response (FIR) digital filter receiving the preprocessed discretization digital signal from the dimension reduction component and filtering the preprocessed discretization digital signal to provide the filtered digital signal to the digital symbol determination component wherein the frequency domain signal provided by the dimension reduction component to the FIR filter includes only frequency bands with a signal-to-noise ratio (SNR) greater than a minimum level whereby computational complexity is reduced without significantly affecting performance.
6. The receiver of claim 5 wherein the digital preamble detector is configured for receiving the filtered digital signal and providing a weight vector w corresponding to the filtered digital signal; and wherein the digital symbol determination component further comprises a digital symbol estimator component for receiving the filtered digital signal and for receiving the weight vector w to provide a noise product signal γ which is selectively sampled by the symbol synchronization signal to provide the outbound message.
7. The receiver of claim 2 wherein the A/D converter component is part of the digital processor and wherein the digital processor includes a buffering component buffering the digital message signal to sequentially provide a half-cycle signal, said buffering component including a phase locked loop (PLL) component including a phase detector, a digitally controlled oscillator (DCO) and a loop filter receiving the digital filtered signal and providing a half-cycle synchronization signal corresponding thereto, said half-cycle synchronization signal sampling the half-cycle signal to provide the corresponding digital signal.
8. The receiver of claim 1 wherein the digital preprocessor component comprises:
a fast Fourier transform (FFT) component receiving the corresponding digital signal and providing a frequency domain signal corresponding to the digital signal; and
a dimension reduction component connected to the FFT component for receiving the frequency domain signal, said dimension reduction component providing the preprocessed discretization digital signal corresponding to the received corresponding digital signal.
9. The receiver of claim 8 further comprising a finite impulse response (FIR) digital filter receiving the preprocessed discretization digital signal from the dimension reduction component and filtering the preprocessed discretization digital signal to provide the filtered digital signal to the digital symbol determination component wherein the frequency domain signal provided by the dimension reduction component to the FIR filter includes only frequency bands with a signal-to-noise ratio (SNR) greater than a minimum level whereby computational complexity is reduced without significantly affecting performance.
10. The receiver of claim 1 wherein the digital preamble detector is configured for receiving the filtered digital signal and providing a weight vector corresponding to the filtered digital signal; and wherein the digital symbol determination component further comprises a digital symbol estimator component for receiving the filtered digital signal and for receiving the weight vector to provide the noise product signal which is selectively sampled according to the symbol synchronization signal to provide the outbound message.
11. The receiver of claim 10 wherein the digital preamble detector comprises computer executable instructions on a tangible computer readable storage medium, said instructions executed by the digital processor, said instructions comprising:
a component to form a filtered preamble sequence;
a component for iteratively estimating received symbols and steering vectors;
a component for thresholding the estimated symbols; and
a component for comparing the resulting sequence to filtered preamble sequence wherein a detect indicator is set to 1 if there are fewer than a preset number of errors.
12. The receiver of claim 11 wherein adaptive equalization is implemented and further comprising estimating a noise covariance matrix for the adaptive equalization.
13. The receiver of claim 12 wherein the digital preprocessor component comprises:
a fast Fourier transform (FFT) component receiving the corresponding digital signal and providing a frequency domain signal corresponding to the digital signal; and
a dimension reduction component connected to the FFT component for receiving the frequency domain signal, said dimension reduction component providing the preprocessed discretization digital signal corresponding to the received corresponding digital signal.
14. A two-way automatic communications system (TWACS) used by an electrical utility comprising:
a substation sending analog outbound messages from the utility to a consumer;
a transponder sending inbound messages from the consumer to the utility, the respective outbound and inbound messages being sent and received over the utility's power distribution system; and
a receiver included in the transponder for enabling the detection of the outbound messages, said receiver comprising:
an analog filter component receiving the analog outbound signal including an outbound message to provide a filtered signal,
an A/D converter component converting the filtered signal to a corresponding digital signal and providing the corresponding digital signal; and
a digital processor executing:
a digital preprocessor component receiving the corresponding digital signal, preprocessing the received corresponding digital signal to provide a preprocessed discretization digital signal; and
a digital symbol determination component receiving the preprocessed discretization digital signal and providing a noise product signal, said digital symbol determination component including a preamble detector providing a symbol synchronization signal corresponding to the preprocessed discretization digital signal, said digital symbol determination component digitally demodulating the received preprocessed discretization digital signal by sampling according to the symbol synchronization signal and according to the noise product signal to provide the outbound message.
15. The system of claim 14 wherein the filter component comprises:
a carrier notch filter receiving the analog outbound signal and canceling the carrier signal to provide an analog message signal; and
a low-pass filter (LPF) component receiving the analog outbound signal and filtering the analog outbound signal to provide a filtered analog outbound signal;
and wherein the A/D converter component comprises:
a first A/D converter digitizing the analog message signal into a digital message signal; and
a second A/D converter digitizing the filtered analog outbound signal and providing a digital filtered signal.
16. The system of claim 15 wherein the digital processor includes a buffering component comprising:
a buffer receiving the digital message signal and sequentially providing a half-cycle buffered signal corresponding thereto, and
a phase locked loop (PLL) component receiving the digital filtered signal and providing a half-cycle synchronization signal corresponding thereto, said half-cycle synchronization signal sampling the half-cycle buffered signal to provide a corresponding digital signal.
17. The system of claim 14 wherein the digital preprocessor component comprises:
a fast Fourier transform (FFT) component receiving the corresponding digital signal and providing a frequency domain signal corresponding to the digital signal; and
a dimension reduction component connected to the FFT component for receiving the frequency domain signal, said dimension reduction component providing the preprocessed discretization digital signal corresponding to the received corresponding digital signal.
18. The system of claim 17 further comprising a finite impulse response (FIR) digital filter receiving the preprocessed discretization digital signal from the dimension reduction component and filtering the preprocessed discretization digital signal to provide the filtered digital signal to the digital symbol determination component wherein the frequency domain signal provided by the dimension reduction component to the FIR filter includes only frequency bands with a signal-to-noise ratio (SNR) greater than a minimum level whereby computational complexity is reduced without significantly affecting performance.
19. The system of claim 14 wherein the digital preamble detector is configured for receiving the filtered digital signal and providing a weight vector corresponding to the filtered digital signal; and wherein the digital symbol determination component further comprises a digital symbol estimator component for receiving the filtered digital signal and for receiving the weight vector to provide the noise product signal which is selectively sampled according to the symbol synchronization signal to provide the outbound message.
20. In a two-way automatic communications system (TWACS) used by an electrical utility in which analog outbound messages are sent from the utility to a consumer and inbound messages are sent from the consumer to the utility, the respective outbound and inbound messages being sent and received over the utility's power distribution system, a method for detecting the outbound messages comprising:
receiving the analog outbound signal including an outbound message;
converting the received analog outbound signal to a corresponding digital signal;
preprocessing the corresponding digital signal to provide a preprocessed discretization digital signal;
providing a noise product signal and providing a symbol synchronization signal corresponding to a preamble of the preprocessed discretization digital signal;
digitally demodulating the preprocessed discretization digital signal by sampling according to the symbol synchronization signal and according to the noise product signal to provide the outbound message.
21. The method of claim 20 wherein the receiving comprises:
filtering the analog outbound signal to cancel the carrier signal and provide an analog message signal; and
receiving the analog outbound signal and filtering the analog outbound signal to provide a filtered analog outbound signal;
and wherein the converting comprises:
digitizing the analog message signal into a digital message signal; and
digitizing the filtered analog outbound signal and providing a digital filtered signal.
22. The method of claim 21 wherein the preprocessing includes buffering comprising:
receiving the digital message signal and sequentially providing a half-cycle buffered signal corresponding thereto, and
receiving by a phase locked loop the digital filtered signal and providing a half-cycle synchronization signal corresponding thereto, said half-cycle synchronization signal sampling the half-cycle buffered signal to provide a corresponding digital signal.
23. The method of claim 22 wherein the preprocessing comprises:
receiving the corresponding digital message signal and providing a frequency domain signal corresponding to the digital signal; and
receiving the frequency domain signal and providing the preprocessed discretization digital signal corresponding to the received corresponding digital signal.
24. The method of claim 23 further comprising:
filtering the preprocessed discretization digital signal to provide the filtered digital signal wherein the frequency domain signal includes only frequency bands with a signal-to-noise ratio (SNR) greater than a minimum level whereby computational complexity is reduced without significantly affecting performance.
25. The method of claim 24 wherein the demodulating comprises:
receiving the filtered digital signal and providing a weight vector corresponding to the filtered digital signal; and
receiving the filtered digital signal and receiving the weight vector to provide the noise product signal which is selectively sampled by the symbol synchronization signal to provide the outbound message.