IP Library Granted Patent US 8,570,799
Granted Patent B2
US 8,570,799 · App. 13/210,460 · Granted Oct 29, 2013

Magnetic random access memory with conversion circuitry

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Quick Facts
Patent No.
US 8,570,799
App. No.
13/210,460
Granted
Oct 29, 2013
Kind
B2
Abstract

A magnetic random access memory is configured as a read/write memory and at least a first section of the magnetic random access memory is configured to be converted to a read only memory.

Claims (29)

1. A magnetic random access memory device, comprising:

a magnet random access memory configured as a read/write memory, and

a conversion circuitry configured to convert at least a first section of the magnet random access memory to a read only memory,

wherein the conversion circuitry is configured to convert the at least first section to the read only memory in an irreversible manner, and

wherein the device further comprises at least one write line, and the conversion circuitry comprises a fuse electrically connected to the write line.

2. A magnetic random access memory device, comprising:

a magnet random access memory configured as a read/write memory, and

a conversion circuitry configured to convert at least a first section of the magnet random access memory to a read only memory,

wherein the conversion circuitry is configured to convert the at least first section to the read only memory back to the read/write memory in a reversible manner, and

wherein the conversion circuitry comprises a storage medium configured to store an information indicating whether a section of the first memory section can be written upon or not.

3. The magnetic random access memory device according to claim 2 , wherein the storage medium comprises a plurality of bit positions, wherein each one of the bit positions is associated with one section of the magnetic random access memory.

4. A data processing system, comprising:

a semiconductor chip,

a processing unit,

a magnetic random access memory,

a static random access memory, and

a bus system connecting the processing unit, the static random access memory, and the magnetic random access memory with each other,

wherein the magnetic random access memory and the static random access memory are integrated on the semiconductor die.

5. The data processing system according to claim 4 , wherein the magnetic random access memory is configured as a read/write memory and at least a first section of the magnetic random access memory is configured to be converted to a read only memory.

6. The data processing system according to claim 4 , further comprising:

a conversion circuitry configured to convert at least a first section of the magnetic random access memory to a read only memory.

7. The data processing system according to claim 4 , wherein the processing unit is a digital signal processor.

8. The data processing system according to claim 7 , wherein mathematical algorithms are stored in a section of the magnetic random access memory that is converted to a read only memory.

9. The data processing system according to claim 4 , wherein the processing unit is a microprocessor or a micro-controller.

10. The data processing system according to claim 9 , wherein customer specific data are stored in a section of the magnetic random access memory that is converted to a read only memory.

11. The data processing system according to claim 9 , wherein secure boot features are stored in a section of the magnetic random access memory that is converted to a read only memory.

12. A magnetic random access memory device, comprising:

a magnetic random access memory comprising a first section and a second section, wherein the first section is configured as a read/write memory and the second section is configured as a read only memory, the second section having stored customer specific data or code, and

a conversion circuitry configured to convert at least a part of the first section of the magnet random access memory to a read only memory.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 29, 2022
From: INTEL DEUTSCHLAND GMBH
To: INTEL CORPORATION
Reel/Frame 061356/0001 →
CHANGE OF NAME Recorded Nov 6, 2015
From: INTEL MOBILE COMMUNICATIONS GMBH
To: INTEL DEUTSCHLAND GMBH
Reel/Frame 037057/0061 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 14, 2011
From: HILDEBRAND, UWE; HAUSNER, JOSEF; OBERMEIER, MATTHIAS; BERGMANN, DANIEL
To: INTEL MOBILE COMMUNICATIONS GMBH
Reel/Frame 027061/0091 →