Current balancing of parallel connected semiconductor components
View Patent ↗A method and an arrangement are provided for balancing the switching transient behavior of parallel connected power semiconductor components. The method includes providing a switch signal to the parallel connected power semiconductor components for changing the state of the components, forming control signals for each of the parallel connected components from the switch signal, and determining, during the change of state of the power semiconductor component, the voltage induced to an inductance in the main current path of the component in each of the parallel connected components. The method also includes comparing each of the induced voltages with a predetermined threshold voltage, measuring time differences between the time instants at which the induced voltages crosses the threshold voltage, and modifying one or more of the control signals on the basis of the measured time differences in the respective following state change for balancing the switching transient behavior.
1. A method of balancing switching transient behavior of parallel connected power semiconductor components, the method comprising:
providing a switch signal to the parallel connected power semiconductor components to change a state of the components;
forming control signals for each of the parallel connected components from the switch signal;
determining, during the change of state of the power semiconductor components, a voltage induced to an inductance in a main current path of each component, respectively;
comparing each of the induced voltages with a predetermined threshold voltage;
measuring time differences between time instants at which the induced voltages cross the threshold voltage; and
modifying at least one of the control signals on the basis of the measured time differences in a respective following state change of the components for balancing the switching transient behavior.
2. A method according to claim 1 , wherein at least one of the control signals is modified before the at least one of the control signals is fed to corresponding gate units of the components, respectively.
3. A method according to claim 1 , wherein the time instants at which the induced voltages cross the threshold voltage are the instants at which the induced voltage falls.
4. A method according to claim 2 , wherein the inductance in the main current path comprises a stray inductance of the component.
5. A method according to claim 4 , wherein the modifying of at least one of the control signals comprises:
adding a delay term obtained in a previous state change to a previously used delay term to obtain a sum of the delay terms; and
using the obtained sum as a delay term for delaying the at least one of the control signals.
6. A method according to claim 5 , wherein the time instants at which the induced voltages cross the threshold voltage are the instants at which the induced voltage rises.
7. A method according to claim 5 , wherein the time instants at which the induced voltages cross the threshold voltage are the instants at which the induced voltage falls.
8. A method according to claim 2 , wherein the inductance in the main current path comprises an additional inductive component.
9. A method according to claim 8 , wherein the modifying of at least one of the control signals comprises:
adding a delay term obtained in a previous state change to a previously used delay term to obtain a sum of the delay terms; and
using the obtained sum as a delay term for delaying the at least one of the control signals.
10. A method according to claim 9 , wherein the time instants at which the induced voltages cross the threshold voltage are the instants at which the induced voltage rises.
11. A method according to claim 9 , wherein the time instants at which the induced voltages cross the threshold voltage are the instants at which the induced voltage falls.
12. A method according to claim 1 , wherein at least one of the control signals is modified at a corresponding gate unit of the components, respectively.
13. A method according to claim 1 , wherein the inductance in the main current path comprises a stray inductance of the component.
14. A method according to claim 1 , wherein the inductance in the main current path comprises an additional inductive component.
15. A method according to claim 1 , wherein the modifying of at least one of the control signals comprises:
adding a delay term obtained in a previous state change to a previously used delay term to obtain a sum of the delay terms; and
using the obtained sum as a delay term for delaying the at least one of the control signals.
16. A method according to claim 15 , wherein the time instants at which the induced voltages cross the threshold voltage are the instants at which the induced voltage rises.
17. A method according to claim 15 , wherein the time instants at which the induced voltages cross the threshold voltage are the instants at which the induced voltage falls.
18. A method according to claim 1 , wherein the time instants at which the induced voltages cross the threshold voltage are the instants at which the induced voltage rises.
19. An arrangement of balancing switching transient behavior of parallel connected power semiconductor components, wherein the arrangement comprises:
means for providing a switch signal to the parallel connected power semiconductor components for changing a state of the components;
means for forming control signals for each of the parallel connected components from the switch signal;
means for determining, during the change of state of the power semiconductor components, a voltage induced to an inductance in a main current path of each component, respectively;
means for comparing each of the induced voltages with a predetermined threshold voltage;
means for measuring time differences between time instants at which the induced voltages cross the threshold voltage; and
means for modifying at least one of the control signals on the basis of the measured time differences in a respective following state change of the components for balancing the switching transient behavior.
20. An arrangement according to claim 19 , wherein the means for modifying the at least one of the control signals modifies the at least one of the control signals before the at least one of the control signals is fed to corresponding gate units of the components, respectively.
21. An arrangement according to claim 19 , wherein the means for modifying the at least one of the control signals modifies the at least one of the control signals at a corresponding gate unit of the components, respectively.
22. An arrangement according to claim 19 , method according to claim 1 , wherein the inductance in the main current path comprises a stray inductance of the component.
23. An arrangement according to claim 19 , wherein the inductance in the main current path comprises an additional inductive component.
24. An arrangement according to claim 19 , wherein the means for modifying at least one of the control signals comprises:
means for adding a delay term obtained in a previous state change to a previously used delay term to obtain a sum of the delay terms; and
means for using the obtained sum as a delay term for delaying the at least one of the control signals.
25. An arrangement according to claim 19 , wherein the time instants at which the induced voltages cross the threshold voltage are the instants at which the induced voltage rises.
26. An arrangement according to claim 19 , wherein the time instants at which the induced voltages cross the threshold voltage are the instants at which the induced voltage falls.