Noise suppression and/or reduction circuits and methods for capacitance sensing systems
A capacitance sensing system can include a noise detector coupled to a capacitance sensing network that generates a noise detect signal in response to noise; a delay circuit coupled to generate at least two different delayed sense signals in response to outputs from the capacitance sensing network; and a switch circuit that selectively outputs one of the delayed sense signals in response to the noise detect signal. Particular embodiments can include selectively discarding discrete analog samples of a capacitance signal when noise is detected in such a sample.
1. A capacitance sensing system, comprising:
a noise detector coupled to a capacitance sensing network that generates a noise detect signal in response to noise;
a delay circuit coupled to generate at least two different delayed sense signals in response to outputs from the capacitance sensing network; and
a switch circuit that selectively outputs at least one of the delayed sense signals in response to the noise detect signal.
2. The capacitance sensing system claim 1 , wherein:
the noise detector comprises
at least one comparator circuit having an input coupled to the capacitance sense network, and
a pulse generator that generates a pulse in response to an output of the comparator circuit.
3. The capacitance sensing system claim 1 , wherein:
the capacitance sensing network comprises
a transmit circuit that transmits a first signal to at least one transmit electrode in the capacitance sensing network; and
receive electrodes that generate sense signals in response to the first signal, at least one receive electrode being coupled to the noise detector.
4. The capacitance sensing system claim 1 , wherein:
the capacitance sensing network comprises
a transmit circuit that transmits a first signal to at least one transmit electrode in the capacitance sensing network, at least one transmit electrode being coupled to the noise detector; and
receive electrodes that generate sense signals in response to the first signal.
5. The capacitance sensing system claim 1 , further including:
a charge to voltage converter coupled between the capacitance sensing network and the delay circuit that converts charge values received from the capacitance sensing network to voltage values.
6. The capacitance sensing system claim 1 , wherein:
the delay circuit includes a switched capacitor delay line having a plurality of tap locations, each tap location providing a different one of the delayed sense signals.
7. The capacitance sensing system claim 6 , wherein:
the capacitance sensing network outputs a periodic signal; and
the switched capacitor delay line rectifies the periodic signal.
8. The capacitance sensing system claim 1 , further including:
a display device physically coupled to the capacitance sensing network that serves as a source of noise for the capacitance sensing network.
9. The capacitance sensing system claim 8 , wherein:
the display device comprises a liquid crystal display.
10. The capacitance sensing system claim 1 , further including:
a conversion circuit coupled to the output of the switch circuit that generates a digital value corresponding to a voltage of a received delayed sense signal.
11. The capacitance sensing system claim 10 , wherein:
the conversion circuit is configured to alter at conversion time to generate the digital value in response to the noise detect signal.
12. The capacitance sensing system claim 1 , wherein:
the noise detector comprises
a first comparator having one input coupled to receive an output from the capacitance sensing network and another input coupled to a first reference value, and
a second comparator having one input coupled to receive the output from the capacitance sensing network and another input coupled to a second reference value.
13. The capacitance sensing system claim 1 , wherein:
the delay circuit comprises a rectifier circuit;
the noise detector comprises
a low pass filter (LPF) having an input coupled to an output of the rectifier circuit,
a first comparator having one input coupled to an output of the delay circuit, and a second input coupled to an output of the LPF, and
a second comparator having one input coupled to the output of the delay circuit, and a second input coupled to an output of the LPF.
14. The capacitance sensing system claim 1 , wherein:
the noise detector comprises
a first comparator having one input coupled to an output of the capacitance sensing network, and a second input coupled to receive a delayed sense signal from the delay circuit, and
a second comparator having one input coupled to the output of the capacitance sensing network, and a second input coupled to receive the delayed sense signal from the delay circuit.