IP Library Granted Patent US 9,698,284
Granted Patent B2
US 9,698,284 · App. 13/222,393 · Granted Jul 4, 2017

Individual finger isolation through spot application of a dielectric in an optoelectronic device

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Quick Facts
Patent No.
US 9,698,284
App. No.
13/222,393
Granted
Jul 4, 2017
Kind
B2
Abstract

An optoelectronic device including at least one of a solar device, a semiconductor device, and an electronic device. The device includes a semiconductor unit. A plurality of metal fingers is disposed on a surface of the semiconductor unit for electrical conduction. Each of the metal fingers corresponds to a section of the optoelectronic device. A plurality of pad areas is available for connection to a bus bar, wherein each of the metal fingers is connected to a corresponding pad area for forming an electrical contact. The optoelectronic device includes a bad section, wherein the bad section is associated with a compromised metal finger and a compromised pad area. A dielectric spot coating is disposed above the compromised pad area to electrically isolate the bad section.

Claims (43)

1. An optoelectronic device, comprising:

a semiconductor unit;

a plurality of metal fingers disposed on a surface of said semiconductor unit for electrical conduction, wherein each of said plurality of metal fingers corresponds to a section of said semiconductor unit, and wherein each of said plurality of metal fingers is electrically isolated from the other metal fingers;

a plurality of pad areas disposed on said surface of said semiconductor unit and available for connection to a bus bar, wherein each of said plurality of metal fingers is connected and adjacently disposed to a corresponding pad area of said plurality of pad areas for forming an electrical contact between the metal finger and the corresponding pad area,

wherein said semiconductor unit includes a bad section in proximity to a first metal finger of said plurality of metal fingers, wherein said bad section compromises said first metal finger and a corresponding first pad area of said plurality of pad areas; and

a dielectric spot coating disposed to cover said compromised first pad area and said compromised first metal finger while leaving remaining metal fingers and remaining pad areas completely uncovered by said dielectric spot coating, wherein said dielectric spot coating is operable to electrically isolate said bad section from said bus bar through isolation of said compromised first metal finger and said compromised first pad area from said bus bar.

2. The optoelectronic device of claim 1 , wherein said bus bar is disposed over said plurality of pad areas, wherein said compromised first pad area is electrically isolated from said bus bar, and wherein said remaining pad areas are electrically connected to said bus bar.

3. The optoelectronic device of claim 2 , further comprising:

a dielectric coating disposed over said compromised first metal finger and said bus bar.

4. The optoelectronic device of claim 2 , wherein said dielectric spot coating comprises an anti-reflective coating.

5. The optoelectronic device of claim 1 , wherein said semiconductor unit comprises a p-n layer such that electrical energy is created when photons are absorbed by said p-n layer.

6. The optoelectronic device of claim 5 , further comprising:

a metal backing layer disposed below and electrically isolated from said p-n layer, wherein said metal backing layer is available for electrical coupling to another underlying optoelectronic device.

7. The optoelectronic device of claim 1 , wherein:

the bus bar is disposed over the plurality of pad areas including the compromised first pad area covered by the dielectric spot coating, and

the optoelectronic device further comprises a dielectric layer disposed over the bus bar, the plurality of metal fingers including the compromised first metal finger covered by the dielectric spot coating, and portions of a top surface of the semiconductor unit.

8. An electronic device, comprising:

a first p-n layer of a first optoelectronic device such that electrical energy is created when photons are absorbed by said first p-n layer;

a first plurality of metal fingers disposed on a surface of said first p-n layer for electrical conduction, wherein each of said first plurality of metal fingers corresponds to a section of said first p-n layer, and wherein each of said first plurality of metal fingers is electrically isolated from the other metal fingers;

a first plurality of pad areas disposed on said surface of said first p-n layer and available for connection to an external bus bar, wherein each of said first plurality of metal fingers is adjacently disposed and connected to a corresponding pad area of said plurality of pad areas for forming an electrical contact between the metal finger and the corresponding pad area;

wherein the first p-n layer includes a bad section in proximity to a first metal finger of said first plurality of metal fingers, wherein said bad section compromises said first metal finger and a corresponding first pad area of said first plurality of pad areas; and

a dielectric spot coating disposed to cover said compromised first pad area and said compromised first metal finger while leaving remaining metal fingers and pad areas completely uncovered by said dielectric spot coating, wherein said dielectric spot coating is operable to electrically isolate said bad section from said external bus bar through isolation of said compromised first metal finger and said compromised first pad area from said external bus bar.

9. The electronic device of claim 8 , wherein said external bus bar is disposed over said plurality of pad areas, wherein said compromised first pad area is electrically isolated from said external bus bar, and wherein said remaining pad areas are electrically connected to said external bus bar.

10. The electronic device of claim 8 , further comprising:

a second optoelectronic device overlaid said first optoelectronic device, said second optoelectronic device comprising:

a semiconductor unit;

a metal backing layer disposed under and electrically isolated from said semiconductor unit;

a buffer layer disposed under said metal backing layer; and

a plurality of blind vias filled with electrically conductive material and providing electrical access to said metal backing layer acting as said external bus bar to said first plurality of pad areas of said first optoelectronic device, wherein said plurality of blind vias is aligned with said first plurality of pad areas, and wherein said metal backing layer is electrically isolated from said compromised first pad area.

11. The electronic device of claim 10 , wherein:

said semiconductor unit comprises a second p-n layer such that electrical energy is created when photons are absorbed by said second p-n layer, and

said second optoelectronic device further comprises:

a second plurality of metal fingers disposed on a surface of said second p-n layer for electrical conduction, wherein each of said second plurality of metal fingers corresponds to a section of said second p-n layer, and wherein each of said second plurality of metal fingers is electrically isolated from the other metal fingers; and

a second plurality of pad areas disposed on the surface of said second p-n layer and available for connection to a bus bar different from the external bus bar, wherein each of said second plurality of metal fingers is adjacently disposed and connected to a corresponding pad area in said second plurality of pad areas for forming an electrical contact between the metal finger and the corresponding pad area.

12. The electronic device of claim 10 , further comprising:

a dielectric coating disposed over front surfaces of each of said first optoelectronic device and said second optoelectronic device.

13. The electronic device of claim 8 , wherein said first optoelectronic electronic device further comprises a metal backing layer disposed under and electrically isolated from said first p-n layer available for electrical coupling to another underlying optoelectronic device.

14. An optoelectronic device, comprising:

a semiconductor unit;

a plurality of metal fingers disposed on a surface of said semiconductor unit for electrical conduction, wherein each of said plurality of metal fingers corresponds to a section of said semiconductor unit, and wherein each of said plurality of metal fingers is electrically isolated from the other metal fingers;

a plurality of pad areas disposed on said surface of said semiconductor unit, wherein each of said plurality of metal fingers is connected and adjacently disposed to a corresponding pad area of said plurality of pad areas for forming an electrical contact between the metal finger and the corresponding pad area,

wherein said semiconductor unit includes a bad section in proximity to a first metal finger of said plurality of metal fingers, wherein said bad section compromises said first metal finger and a corresponding first pad area of said plurality of pad areas; and

a dielectric layer disposed to cover said plurality of pad areas, wherein said compromised first pad area is isolated from a bus bar by said dielectric layer, and wherein each remaining pad area of said plurality of pad areas has a corresponding and separate blind via formed in said dielectric layer through which said remaining pad area is available to electrically connect to said bus bar using electrically conductive material disposed within the blind via.

Assignments (11)
SECURITY INTEREST Recorded Aug 28, 2023
From: UTICA LEASECO, LLC
To: TIGER FINANCE, LLC
Reel/Frame 064731/0814 →
CORRECTIVE ASSIGNMENT TO CORRECT THE THE ASSIGNEE ADDRESS PREVIOUSLY RECORDED AT REEL: 055766 FRAME: 0279. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Aug 9, 2021
From: UTICA LEASECO, LLC SECURED PARTY
To: UTICA LEASECO, LLC ASSIGNEE
Reel/Frame 057117/0811 →
CONFIRMATION OF FORECLOSURE TRANSFER OF PATENT RIGHTS Recorded Feb 25, 2021
From: UTICA LEASECO, LLC SECURED PARTY
To: UTICA LEASECO, LLC ASSIGNEE
Reel/Frame 055766/0279 →
SECURITY INTEREST Recorded Apr 29, 2019
From: ALTA DEVICES, INC.
To: UTICA LEASECO, LLC
Reel/Frame 049027/0944 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 11, 2016
From: HANERGY GLOBAL INVESTMENT AND SALES PTE. LTD
To: ALTA DEVICES, INC.
Reel/Frame 038066/0958 →
CHANGE OF NAME Recorded Mar 4, 2016
From: ALTA DEVICES, INC.
To: AWBSCQEMGK, INC.
Reel/Frame 038005/0990 →
CHANGE OF NAME Recorded Mar 4, 2016
From: HANERGY ACQUISITION SUB INC.
To: ALTA DEVICES, INC.
Reel/Frame 038006/0457 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 4, 2016
From: ALTA DEVICES, INC.
To: HANERGY GLOBAL INVESTMENT AND SALES PTE. LTD.
Reel/Frame 038004/0078 →
RELEASE OF SECURITY INTEREST Recorded Jan 16, 2015
From: SILICON VALLEY BANK, AS COLLATERAL AGENT
To: AWBSCQEMGK, INC. (F/K/A ALTA DEVICES, INC.)
Reel/Frame 034775/0973 →
SECURITY AGREEMENT Recorded Apr 10, 2013
From: ALTA DEVICES, INC.
To: SILICON VALLEY BANK, AS AGENT
Reel/Frame 030192/0391 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 31, 2011
From: HEGEDUS, ANDREAS
To: ALTA DEVICES, INC.
Reel/Frame 026837/0494 →