Integrated RF transceiver
View Patent ↗The present disclosure includes an integrated full-duplex transceiver, which may be implemented on a single substrate or die. A single substrate may in turn, comprise, an I/O port configured for full-duplex operation, a transmit portion and a receive portion, a first mixer for up-converting a transmit signal, a second mixer for down-converting a receive signal, a first independently tunable local oscillator that drives the first mixer, and a second independently tunable local oscillator that drives the second mixer. The first independently tunable oscillator may facilitate up-conversion of a transmit IF signal, while a second independently tunable oscillator may facilitate down-conversion of a receive RF signal.
1. An integrated full-duplex transceiver comprising:
a single substrate comprising:
an input/output (“I/O”) port;
a first mixer, electrically connected to the I/O port, for up-converting a transmit signal;
a second mixer, electrically connected to the I/O port, for down-converting a receive signal, wherein the first mixer and the second mixer are configured to communicate the transmit and receive signals simultaneously over the I/O port in full-duplex communication;
a first independently tunable local oscillator that drives the first mixer;
a second independently tunable local oscillator that drives the second mixer;
a multiplexer, electrically connected between the I/O port and the first and second mixers, wherein the multiplexer is configured to receive a plurality of signals;
a variable gain amplifier (“VGA”), electrically connected to the first mixer, wherein a gain of the VGA depends upon a signal generated by at least one of a temperature controlled resistor and a thermistor;
a gain adjust circuit on the substrate that adjusts a gain of at least one of: a digital attenuator on the transceiver and an off-chip amplifier in response to a reading provided by a temperature sensor;
an injection switchable image-reject mixer (“IRM”), electrically connected to the second mixer, that filters a desired image of a received intermediate frequency (“IF”) signal; and
an internal low-dropout regulator electrically connected to the first and second independently tunable local oscillators.
2. The transceiver of claim 1 , the substrate further comprising:
a multiplexer that is electrically connected between the I/O port and the first and second mixers, wherein the multiplexer communicates a first signal and a second signal, wherein the first signal and the second signal are separated in frequency by at least one octave.
3. The transceiver of claim 2 , wherein the first signal and the second signal are one of: a transmit intermediate frequency signal, a receive intermediate frequency signal, a telemetry in signal, a telemetry out signal, and a reference clock signal.
4. The transceiver of claim 1 , wherein the first independently tunable local oscillator and the second independently tunable local oscillator are automatically re-tuned during operation.
5. The transceiver of claim 1 , wherein the first independently tunable local oscillator and the second independently tunable local oscillator are independently tunable by way of a plurality of counter registers, each of which are loaded by way of a bus line and programmed using at least one counter register.
6. The transceiver of claim 1 , wherein the first independently tunable local oscillator facilitates an up-conversion of the transmit signal and the second independently tunable local oscillator facilitates a down-conversion of the receive signal.
7. The transceiver of claim 1 , the substrate further comprising a variable gain amplifier (“VGA”), electrically connected to the first mixer, wherein a gain of the VGA is adjusted in response to at least one of: a temperature external to the transceiver and a temperature internal to the transceiver.
8. The transceiver of claim 1 , the substrate further comprising a gain adjust that adjusts a gain of at least one of: a digital attenuator on the transceiver and an off-chip amplifier in response to a reading provided by a temperature sensor.
9. The transceiver of claim 1 , the substrate further comprising a signal path electrically connected through the second mixer that facilitates backwards compatibility with a legacy modem.
10. The transceiver of claim 1 , the substrate further comprising an internal low-dropout regulator electrically connected to the first and second independently tunable local oscillators.
11. The transceiver of claim 1 , the substrate further comprising a first plurality of programmable registers for tuning the first independently tunable local oscillator and a second plurality of programmable registers for tuning the second independently tunable local oscillator.
12. The transceiver of claim 1 , the substrate further comprising an injection switchable image reject mixer (“IRM”), electrically connected to the second mixer, that filters a desired image of a received intermediate frequency (“IF”) signal and configured to switch from at least one of a high side injection to a low side injection and a low side injection to a high side injection.
13. The transceiver of claim 1 , the substrate further comprising a variable gain amplifier (“VGA”), wherein a gain of the VGA depends upon a signal generated by at least one of a temperature controlled resistor and a thermistor.
14. An integrated full-duplex transceiver comprising:
a single substrate comprising:
an input/output (“I/O”) port;
a first mixer, electrically connected to the I/O Port, for up-converting a transmit signal;
a second mixer, electrically connected to the I/O port, for down-converting a receive signal, wherein the first mixer and the second mixer are configured to communicate the transmit and receive signals simultaneously over the I/O port in full-duplex communication;
a first means for independently tuning a first independently tunable local oscillator that drives the first mixer;
a second means for independently tuning a second independently tunable local oscillator that drives the second mixer;
a multiplexer, electrically connected between the I/O port and the first and second mixers, wherein the multiplexer is configured to receive a plurality of signals;
a variable gain amplifier (“VGA”), electrically connected to the first mixer, wherein a gain of the VGA depends upon a signal generated by at least one of a temperature controlled resistor and a thermistor;
a gain adjust circuit on the substrate that adjusts a gain of at least one of: a digital attenuator on the transceiver and an off-chip amplifier in response to a reading provided by a temperature sensor;
an injection switchable image reject mixer (“IRM”), electrically connected to the second mixer, that filters a desired image of a received intermediate frequency (“IF”) signal and configured to switch from at least one of: a high side injection to a low side injection and a low side injection to a high side injection; and
an internal low-dropout regulator electrically connected to the first and second independently tunable local oscillators.
15. The transceiver of claim 14 , wherein the first independently tunable local oscillator and the second independently tunable local oscillator are automatically re-tuned during operation.
16. The transceiver of claim 14 , the substrate further comprising a gain adjust that adjusts a gain of at least one of: a digital attenuator on the transceiver and an off-chip amplifier in response to a reading provided by a temperature sensor.
17. The transceiver of claim 14 , the substrate further comprising a signal path, electrically connected through the second mixer that facilitates backwards compatibility with a legacy modem.
18. The transceiver of claim 14 , the substrate further comprising a variable gain amplifier (“VGA”), wherein a gain of the VGA depends upon a signal generated by at least one of a temperature controlled resistor and a thermistor.