IP Library Granted Patent US 8,419,444
Granted Patent B2
US 8,419,444 · App. 13/225,584 · Granted Apr 16, 2013

Adapter for high-speed ethernet

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Quick Facts
Patent No.
US 8,419,444
App. No.
13/225,584
Granted
Apr 16, 2013
Kind
B2
Abstract

An adapter includes a mechanical frame, which is configured to be inserted into a SFP-type receptacle and contains a socket for receiving a plug of a twisted-pair-type cable. First electrical terminals, held by the mechanical frame, are configured to mate with a connector in the receptacle. Second electrical terminals, held within the socket, are configured to mate with electrical connections of the plug. Circuitry connects the first and second electrical terminals so as to enable interoperation of the plug with the receptacle.

Claims (22)

1. An adapter, comprising:

a mechanical frame, which is configured to be inserted into a SFP-type receptacle and contains a socket for receiving a plug of a twisted-pair-type cable;

first electrical terminals, held by the mechanical frame and configured to mate with a connector in the receptacle so as to transmit and receive first signals to and from the connector in a first signal format;

second electrical terminals, held within the socket and configured to mate with electrical connections of the plug so as to transmit and receive second signals to and from the plug in a second signal format, different from the first signal format; and

circuitry connecting the first and second electrical terminals and comprising at least one integrated circuit, which is contained within the mechanical frame and is configured to convert between the first and second signal formats so as to enable interoperation of the plug with the receptacle.

2. The adapter according to claim 1 , wherein the plug is a RJ45 plug.

3. The adapter according to claim 2 , wherein the SFP-type receptacle is selected from a group of receptacles consisting of QSFP, QSFP+ and SFP+ receptacles.

4. The adapter according to claim 1 , wherein the connector in the receptacle is an edge connector, and wherein the circuitry comprises a printed circuit board, and wherein the first electrical terminals are located at an end of the printed circuit board and are configured to mate with the edge connector.

5. The adapter according to claim 1 , wherein the at least one integrated circuit is configured to convert between a single-lane signal on the first electrical terminals and a multi-lane signal on the second electrical terminals.

6. The adapter according to claim 1 , wherein the circuitry is configured to convert between a 10 GBASE-R interface of the receptacle and a 10 GBASE-T interface of the plug.

7. A method for communication, comprising:

inserting an adapter into a SFP-type receptacle, the adapter comprising:

a mechanical frame, which is configured to be inserted into the receptacle and contains a socket for receiving a plug of a twisted-pair-type cable;

first electrical terminals, held by the mechanical frame and configured to mate with a connector in the receptacle so as to transmit and receive first signals to and from the connector in a first signal format;

second electrical terminals, held within the socket and configured to mate with electrical connections of the plug so as to transmit and receive second signals to and from the plug in a second signal format, different from the first signal format; and

circuitry connecting the first and second electrical terminals and comprising at least one integrated circuit, which is contained within the mechanical frame and is configured to convert between the first and second signal formats so as to enable interoperation of the plug with the receptacle; and

inserting the plug of the twisted-pair-type cable into the socket.

8. The method according to claim 7 , wherein the plug is a RJ45 plug.

9. The method according to claim 8 , wherein the SFP-type receptacle is selected from a group of receptacles consisting of QSFP, QSFP+ and SFP+ receptacles.

10. The method according to claim 7 , wherein the connector in the receptacle is an edge connector, and wherein the circuitry comprises a printed circuit board, and wherein the first electrical terminals are located at an end of the printed circuit board, and wherein inserting the adapter comprises inserting the end of the printed circuit board into the edge connector.

11. The method according to claim 7 , and comprising converting, using the at least one integrated circuit, between a single-lane signal on the first electrical terminals and a multi-lane signal on the second electrical terminals.

12. The method according to claim 7 , and comprising converting, using the circuitry, between a 10 GBASE-R interface of the receptacle and a 10 GBASE-T interface of the plug.

Assignments (3)
RELEASE OF SECURITY INTEREST IN PATENT COLLATERAL AT REEL/FRAME NO. 37900/0720 Recorded Jul 13, 2018
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MELLANOX TECHNOLOGIES, LTD.
Reel/Frame 046542/0792 →
PATENT SECURITY AGREEMENT Recorded Feb 24, 2016
From: MELLANOX TECHNOLOGIES, LTD.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 037900/0720 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 6, 2011
From: KAGAN, MICHAEL; SELA, OREN TZVI; ZER, YORAM
To: MELLANOX TECHNOLOGIES LTD.
Reel/Frame 026856/0440 →