Digital receiver and method
View Patent ↗A receiver and method is provided for sigma-delta converting an RF signal to a digital signal and downconverting to a digital baseband signal. The RF signal is split into N phases, as can be accomplished using a sample and hold circuit, and each phase is digitized, as can be accomplished using an analog-to-digital (A/D) sigma-delta converter. Polyphase decimation techniques and demodulation are applied to the phased signals to generate a demodulated digital signal. The demodulated digital signal is further downconverted to the appropriate baseband signal.
1. A receiver, comprising:
a sampler operable to separate a radio frequency signal into a plurality of phased analog signals;
a sigma delta analog to digital converter system operable to convert the plurality of phased analog signals into a plurality of phased digital signals, wherein the sigma delta analog to digital converter system comprises a plurality of sigma delta analog to digital converters, each operable to convert a respective phased analog signal to a respective phased digital signal; and
a digital downconverter operable to combine and downconvert the plurality of phased digital signals into downconverted digital signal.
2. The receiver of claim 1 , further comprising:
a low noise amplifier operable to amplify a radio frequency input signal; and
an analog bandpass filter operable to filter the amplified radio frequency input signal to produce the radio frequency signal.
3. The receiver of claim 1 , further comprising a local oscillator coupled to the sampler, the local oscillator being operable to generate a local clocking signal for use in separating the radio frequency signal into the plurality of phased analog signals.
4. The receiver of claim 1 , wherein the digital signal comprises I and Q signals and the digital downconverter is further operable to demodulate the phased digital signals to generate the I and Q signals.
5. The receiver of claim 1 , wherein the sampler comprises a plurality of filters, each filter being operable to filter a respective analog signal of the plurality of phased analog signals.
6. The receiver of claim 1 , wherein:
the plurality of phased analog signals comprises N parallel phased analog signals, N being an integer multiple of 4; and
the sampler comprises a polyphase filter, the polyphase filter comprising N sub-filters, each sub-filter being operable to filter a respective analog signal of the plurality of phased analog signals.
7. The receiver of claim 6 , wherein the polyphase filter comprises a digital finite impulse response filter.
8. The receiver of claim 6 , wherein:
the digital signal comprises I and Q signals; and
filter coefficients of the sub-filters are selected such that the sub-filters operate as a demodulator for generating the I and Q signals.
9. The receiver of claim 1 , wherein each digital signal of the plurality of phased digital signals comprises a sample having one or more binary bits.
10. A method of downconverting a received analog signal, the method comprising:
sampling and separating a radio frequency signal into a plurality of phased analog signals;
converting the plurality of phased analog signals into a plurality of phased digital signals using a sigma delta analog to digital converter system, wherein the sigma delta analog to digital converter system comprises a plurality of sigma delta analog to digital converters each operable to convert a respective phased analog signal to a respective phased digital signal; and
combining and downconverting the plurality of phased digital signals into downconverted digital signal using a digital downconverter.
11. The method of claim 10 , further comprising:
amplifying a radio frequency input signal using a low noise amplifier; and
bandpass filtering the amplified radio frequency input signal to produce the radio frequency signal.
12. The method of claim 10 , further comprising generating a local clocking signal for use in separating the radio frequency signal into the plurality of phased analog signals.
13. The method of claim 10 , wherein the digital signal comprises I and Q signals and the digital downconverter operable to demodulate the phased digital signals to generate the I and Q signals.
14. The method of claim 10 , comprising filtering the plurality of phased analog signals.
15. The method of claim 10 , wherein:
the plurality of phased analog signals comprises N parallel phased analog signals, N being an integer multiple of 4; and
filtering the plurality of phased analog signals in a polyphase filter, the polyphase filter comprising N sub-filters, each sub-filter being operable to filter a respective analog signal of the plurality of phased analog signals.
16. The method of claim 15 , wherein the polyphase filter comprises a digital finite impulse response filter.
17. The method of claim 15 , wherein:
the digital signal comprises I and Q signals; and
filter coefficients of the sub-filters are selected such that the sub-filters operate as a demodulator for generating the I and Q signals.
18. The method of claim 10 , wherein each digital signal of the plurality of phased digital signals comprises a sample having one or more binary bits.
19. A receiver, comprising:
a sampler operable to separate a radio frequency signal into a plurality of phased analog signals;
a sigma delta analog to digital converter system operable to convert the plurality of phased analog signals into a plurality of phased digital signals; and
a digital downconverter operable to combine and downconvert the plurality of phased digital signals into downconverted digital signal,
wherein the phased analog signals comprise N parallel phased analog signals, N being an integer multiple of 4, and
wherein the sampler comprises a polyphase filter, the polyphase filter comprising N sub-filters, each sub-filter being operable to filter a respective analog signal of the plurality of phased analog signals.
20. A method of downconverting a received analog signal, the method comprising:
sampling and separating a radio frequency signal into a plurality of phased analog signals;
converting the plurality of phased analog signals into a plurality of phased digital signals using a sigma delta analog to digital converter system, wherein each digital signal of the plurality of phased digital signals comprises a sample having one or more binary bits; and
combining and downconverting the plurality of phased digital signals into downconverted digital signal using a digital downconverter.