Impedance matching circuits with multiple configurations

1. An apparatus comprising:

an impedance matching circuit comprising:

a plurality of reactive elements configured to impedance match a load circuit and including at least one variable reactive element configured to tune an impedance of the impedance matching circuit, and

at least one switch configured to set the impedance matching circuit in one of a plurality of configurations, wherein the plurality of reactive elements include a reactive element coupled as a series element in at least one configuration and as a shunt element in at least one other configuration.

2. The apparatus of claim 1 , wherein the plurality of configurations include at least one of a series configuration, a shunt configuration, an “L” configuration, an “R” configuration, a “Pi” configuration, or a “T” configuration.

3. The apparatus of claim 1 , wherein the plurality of configurations include a series configuration having at least one reactive element coupled between an input and an output of the impedance matching circuit.

4. The apparatus of claim 1 , wherein the plurality of configurations include a shunt configuration having at least one reactive element coupled between an output of the impedance matching circuit and circuit ground.

5. The apparatus of claim 1 , wherein the plurality of configurations include an “L” configuration having at least one reactive element coupled between an input and an output of the impedance matching circuit and at least one other reactive element coupled between the output of the impedance matching circuit and circuit ground.

6. The apparatus of claim 1 , wherein the plurality of configurations include an “R” configuration having at least one reactive element coupled between an input and an output of the impedance matching circuit and at least one other reactive element coupled between the input of the impedance matching circuit and circuit ground.

7. The apparatus of claim 1 , wherein the plurality of configurations include a “Pi” configuration having a first reactive element coupled between an input and an output of the impedance matching circuit, a second reactive element coupled between the input of the impedance matching circuit and circuit ground, and a third reactive element coupled between the output of the impedance matching circuit and circuit ground.

8. The apparatus of claim 1 , wherein the plurality of configurations include a “T” configuration having a first reactive element coupled between an input of the impedance matching circuit and an intermediate node, a second reactive element coupled between the intermediate node and an output of the impedance matching circuit, and a third reactive element coupled between the intermediate node and circuit ground.

9. The apparatus of claim 1 , wherein the plurality of reactive elements include an inductor coupled as a series inductor in at least one configuration and as a shunt inductor in at least one other configuration.

10. The apparatus of claim 1 , wherein the plurality of reactive elements include a variable capacitor coupled as a series capacitor in at least one configuration and as a shunt capacitor in at least one other configuration.

11. The apparatus of claim 1 , wherein the plurality of reactive elements include a reactive element coupled between a first pair of nodes in the impedance matching circuit in at least one configuration and between a second pair of nodes different from the first pair of nodes in at least one other configuration.

12. The apparatus of claim 1 , wherein the at least one switch includes a switch having a single input coupled to one of the plurality of reactive elements and at least two outputs coupled to at least two nodes in the impedance matching circuit.

13. The apparatus of claim 1 , wherein the load circuit comprises an antenna, and wherein the impedance matching circuit performs impedance matching for the antenna.

14. The apparatus of claim 1 , wherein the load circuit comprises a power amplifier, and wherein the impedance matching circuit performs output impedance matching for the power amplifier.

15. The apparatus of claim 1 , wherein the load circuit comprises a low noise amplifier (LNA), and wherein the impedance matching circuit performs input impedance matching for the LNA.

16. The apparatus of claim 1 , further comprising:

a controller configured to select one of the plurality of configurations of the impedance matching circuit.

17. The apparatus of claim 1 , further comprising:

a memory configured to store a plurality of circuit settings for the impedance matching circuit, each circuit setting being associated with one of the plurality of configurations, at least one switch setting for the at least one switch, at least one control setting for the at least one variable reactive element, or a combination thereof.

18. The apparatus of claim 17 , wherein the plurality of circuit settings are associated with different frequencies, and wherein one of the plurality of circuit settings is selected based on an operating frequency of the apparatus.

19. The apparatus of claim 1 , wherein the apparatus comprises an integrated circuit.

20. An apparatus for wireless communication, comprising:

means for performing impedance matching for a load circuit, the means for performing impedance matching including at least one variable reactive element configured to tune an impedance of the means for performing impedance matching; and

means for setting the means for performing impedance matching in one of a plurality of configurations, wherein the at least one reactive element includes a reactive element coupled as a series element in at least one configuration and as a shunt element in at least one other configuration.

21. The apparatus of claim 20 , further comprising:

means for storing a plurality of settings for the means for performing impedance matching; and

means for selecting one of the plurality of settings for the means for performing impedance matching.