IP Library Granted Patent US 8,570,096
Granted Patent B2
US 8,570,096 · App. 13/232,529 · Granted Oct 29, 2013

Transistor substrate dynamic biasing circuit

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Quick Facts
Patent No.
US 8,570,096
App. No.
13/232,529
Granted
Oct 29, 2013
Kind
B2
Abstract

A dynamic biasing circuit of the substrate of a MOS power transistor may include a first switch configured to connect the substrate to a current source which forward biases the intrinsic source-substrate diode of the transistor, when the gate voltage of the transistor turns the transistor on. The current source may include a stack of diodes in the same conduction direction as the intrinsic diode between the substrate and a supply voltage.

Claims (22)

1. A dynamic biasing circuit for a substrate of a metal oxide semiconductor (MOS) power transistor to be coupled to power an electronic function block on or off, the MOS power transistor comprising an intrinsic source-substrate diode, the dynamic biasing circuit comprising:

a current source;

a first switch configured to couple the substrate to said current source so that the intrinsic source-substrate diode is forward biased when a gate voltage of the MOS power transistor turns the MOS power transistor on;

said current source comprising a stack of diodes between the substrate and a supply voltage and having a same conduction direction as the intrinsic source-substrate diode; and

interrupt circuitry configured to interrupt current in said stack of diodes when the electronic function block is inactive based upon an associated output signal and when the MOS power transistor is on.

2. The dynamic biasing circuit according to claim 1 , further comprising a second switch configured to couple the substrate to a reference voltage so that the intrinsic source-substrate diode is one of reverse biased and biased with a zero voltage when a gate voltage of the MOS power transistor turns the MOS power transistor off.

3. The dynamic biasing circuit according to claim 2 , wherein said first switch comprises a transistor of opposite conductivity to that of the MOS power transistor; wherein said second switch comprises a transistor with a same conductivity as that of the MOS power transistor; and further comprising an inverter having an input coupled to a gate of the MOS power transistor and an output coupled to gates of said transistors of said first and second switches.

4. An integrated circuit comprising:

a substrate;

a power transistor on said substrate and to be coupled to power an electronic function block on or off, the MOS power transistor having an intrinsic source-substrate diode;

a current source between said substrate and a supply voltage, and comprising a stack of diodes;

a first switch configured to couple said substrate to said current source so that the intrinsic source-substrate diode is forward biased when a control terminal voltage of the power transistor turns the power transistor on; and

interrupt circuitry configured to interrupt current in said stack of diodes when the electronic function block is inactive based upon an associated output signal and when the power transistor is on.

5. The integrated circuit according to claim 4 , further comprising a second switch configured to couple the substrate to a reference voltage so that the intrinsic source-substrate diode is one of reverse biased and biased with a zero voltage when a control terminal voltage of the power transistor turns the power transistor off.

6. The integrated circuit according to claim 5 , wherein said first switch comprises a transistor of opposite conductivity to that of the power transistor; wherein said second switch comprises a transistor with a same conductivity as that of the power transistor; and further comprising an inverter having an input coupled to a control terminal of the power transistor and an output coupled to control terminals of said transistors of said first and second switches.

7. A biasing method for a substrate of a metal oxide semiconductor (MOS) power transistor coupled to power an electronic function block on or off, the MOS power transistor comprising an intrinsic source-substrate diode, the method comprising:

using a first switch to couple the substrate to a current source so that the intrinsic source-substrate diode is forward biased when a gate voltage of the MOS power transistor turns the MOS power transistor on;

the current source comprising a stack of diodes between the substrate and a supply voltage and having a same conduction direction as the intrinsic source-substrate diode; and

using interrupt circuitry to interrupt current in the stack of diodes when the electronic function block is inactive based upon an associated output signal and when the MOS power transistor is on.

8. The method according to claim 7 , further comprising using a second switch to couple the substrate to a reference voltage so that the intrinsic source-substrate diode is one of reverse biased and biased with a zero voltage when a gate voltage of the MOS power transistor turns the MOS power transistor off.

9. The method according to claim 8 , wherein the first switch comprises a transistor of opposite conductivity to that of the MOS power transistor; wherein the second switch comprises a transistor with a same conductivity as that of the MOS power transistor; and further comprising coupling an input of an inverter to a gate of the MOS power transistor and an output to gates of the transistors of the first and second switches.

10. The method according to claim 7 , wherein the stack of diodes comprises transistors having types of conductivity and threshold voltages; and further comprising choosing the transistors according to a desired bias level of the substrate.

Assignments (2)
CHANGE OF NAME Recorded Jul 1, 2024
From: STMICROELECTRONICS SA
To: STMICROELECTRONICS FRANCE
Reel/Frame 068104/0472 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 12, 2011
From: LE COZ, JULIEN; VALENTIAN, ALEXANDRE; FLATRESSE, PHILIPPE; ENGELS, SYLVAIN
To: STMICROELECTRONICS SA
Reel/Frame 027368/0435 →