Method for fabricating a capacitor and capacitor structure thereof
View Patent ↗A method for fabricating a capacitor includes providing a substrate having a first surface and a second surface, and forming a plurality of openings in the substrate, the openings are separated from each other by a shape of the substrate, each opening having sidewalls and a bottom. The method further includes submitting the substrate including the openings to an oxidation process to form an oxide layer covering the sidewalls and the bottom of the openings, and a portion of a surface of the substrate, wherein a shape of the substrate disposed between a pair of two adjacent openings is completely oxidized to form an insulation layer between the pair of two adjacent openings; and depositing a conductive material layer over the oxide layer in the openings such that the conductive material layer is electrically continuous and such that the pair of adjacent openings form a capacitor.
1. A method for fabricating a capacitor, the method comprising:
providing a substrate having a first surface and a second surface;
forming a plurality of openings in the substrate, the openings being separated from each other by a shape of the substrate, each opening having sidewalls and a bottom;
submitting the substrate to an oxidation process to form an oxide layer covering the sidewalls and the bottom of the each opening to form a via structure, and covering a portion of the first surface of the substrate, wherein the shape of the substrate disposed between two adjacent openings is totally oxidized for insulating two adjacent via structures; and
depositing a conductive material layer in the openings, wherein the two adjacent openings form a capacitor.
2. The method of claim 1 further comprising:
removing a portion of the second surface of the substrate to expose a bottom of the via structures.
3. The method of claim 1 , further comprising interconnection vias that are formed from the openings having shapes of the substrate disposed therebetween that are partially oxidized or not oxidized.
4. The method of claim 1 , wherein the openings comprise a height ranging from 200 μm to 300 μm.
5. The method of claim 1 , wherein the substrate comprises a thickness ranging from 200 μm to 800 μm.
6. The method of claim 1 , wherein the two adjacent openings comprise a height ranging from 200 μm to 800 μm.
7. The method of claim 1 , wherein the oxidation process comprises a thermal oxidation process.
8. The method of claim 1 , wherein the conductive material contained in the via structures comprises a rectangular shape ranging from 10 μm×200 μm to 30 μm×800 μm.
9. The method of claim 1 , wherein the conductive material layer comprises copper or aluminum.
10. The method of claim 1 , wherein the openings having shapes of substrate disposed therebetween that are not completely oxidized comprise interconnect vias.
11. The method of claim 1 , wherein depositing a conductive material layer comprises electroplating.