Method and apparatus of providing a biased current limit for limiting maximum output power of power converters
View Patent ↗A biased current-limit circuit for limiting a maximum output power of a power converter includes an oscillator for generating a pulse signal and an oscillation signal. A waveform generator generates a waveform signal in response to the oscillation signal. A sample-hold circuit is used to sample the waveform signal to generate a hold signal in response to a switching signal. The sample-hold circuit further samples the hold signal to generate a current-limit threshold in response to a second-sampling signal. A current comparator is utilized to compare a current-sensing signal with the current-limit threshold to limit a maximum on-time of the switching signal.
1. A method of a biased current limit for limiting a maximum output power of a power converter, comprising:
generating a pulse signal and an oscillation signal;
generating a waveform signal in response to the oscillation signal;
sampling the waveform signal to generate a hold signal in response to a switching signal;
sampling the hold signal to generate a current-limit threshold in response to a second-sampling signal, wherein the switching signal is utilized to switch a transformer of the power converter, and the second-sampling signal is correlated to the pulse signal; and
comparing a current-sensing signal with the current-limit threshold to limit a maximum on-time of the switching signal, wherein the current-sensing signal is correlated to a switching current of the transformer.
2. The method as claimed in claim 1 , wherein the current-limit threshold is a constant when the switching signal is at a high level.
3. The method as claimed in claim 1 , wherein the current-limit threshold is only changed when the switching signal is at a low level.
4. The method as claimed in claim 1 , the waveform signal comprising:
a first DC element;
a ramp element, wherein the amplitude of the ramp element is higher than the amplitude of the first DC element; and
a second DC element, wherein the amplitude of the second DC element is higher than the amplitude of the ramp element, and a slope of the ramp element is determined by the oscillation signal, and the amplitude of the ramp element increases from the amplitude of the first DC element to the amplitude of the second DC element.
5. A biased current-limit circuit for limiting a maximum output power of a power converter, comprising:
an oscillator, generating a pulse signal and an oscillation signal;
a waveform generator, coupled to the oscillator for generating a waveform signal in response to the oscillation signal;
a sample-hold circuit, sampling the waveform signal to generate a hold signal in response to a switching signal, the sample-hold circuit further sampling the hold signal to generate a current-limit threshold in response to a second-sampling signal, wherein the switching signal is utilized to switch a transformer of the power converter, and the second-sampling signal is correlated to the pulse signal; and
a current comparator, comparing a current-sensing signal with the current-limit threshold to limit a maximum on-time of the switching signal, wherein the current-sensing signal is correlated to a switching current of the transformer.
6. The biased current-limit circuit as claimed in claim 5 , wherein the current-limit threshold is a constant when the switching signal is at a high level.
7. The biased current-limit circuit as claimed in claim 5 , wherein the current-limit threshold is only changed when the switching signal is at a low level.
8. The biased current-limit circuit as claimed in claim 5 , the waveform signal comprising:
a first DC element;
a ramp element, wherein the amplitude of the ramp element is higher than the amplitude of the first DC element; and
a second DC element, wherein the amplitude of the second DC element is higher than the amplitude of the ramp element, and a slope of the ramp element is determined by the oscillation signal.