Semiconductor device and method for manufacturing same
According to one embodiment, the semiconductor device includes a first semiconductor layer. The semiconductor device includes a plurality of base regions, the base regions are provided on a surface of the first semiconductor layer. The semiconductor device includes a source region selectively provided on each of surfaces of the base regions. The semiconductor device includes a gate electrode provided via a gate insulating film in each of a pair of trenches, each of the trenches penetrate the base regions from a surface of the source region to the first semiconductor layer. The semiconductor device includes a field plate electrode provided via a field plate insulating film in each of the pair of trenches under the gate electrode. A thickness of a part of the field plate insulating film is greater than a thickness of the gate insulating film.
1. A semiconductor transistor device, comprising:
a first semiconductor layer of a first conductivity type;
a plurality of base regions of a second conductivity type, the base regions provided on a surface of the first semiconductor layer;
a source region of the first conductivity type selectively provided on each of surfaces of the base regions;
a first major electrode electrically connected to the first semiconductor layer;
a second major electrode electrically connected to the source region;
a gate electrode provided via a gate insulating film in each of a pair of trenches on a side of the second major electrode, each of the trenches reaching from a surface of the source region to the first semiconductor layer; and
a field plate electrode provided via a field plate insulating film in each of the pair of trenches on a side of the first major electrode,
a thickness of a part of the field plate insulating film being greater than a thickness of the gate insulating film,
an interface between the first semiconductor layer and the part of the field plate insulating film, not being provided between the source region and the first major electrode, and being provided between the base region and the first major electrode in a direction in which each of the pair of trenches are aligned,
a width of the first semiconductor layer between the pair of trenches at a position of a part of the field plate insulating film being narrower than a width of each of the base regions between the pair of trenches at a position of the gate insulating film, and
the source region not being formed directly above the interface between the first semiconductor layer and the part of the field plate insulating film.
2. The device according to claim 1 , wherein:
a contact region of the second conductivity type is further provided selectively on a surface of the base region;
the contact region is connected to the source region; and
an impurity concentration in the contact region is higher than an impurity concentration in the base region.
3. The device according to claim 2 , wherein a distance between a lower end of the contact region and a rear surface of the first semiconductor layer is shorter than a distance between a lower end of the source region and the rear surface of the first semiconductor layer.
4. The device according to claim 2 wherein the contact region penetrates the base region and the lower end of the contact region is in contact with the first semiconductor layer.
5. The device according to claim 2 , wherein the contact region is formed directly above the interface between the first semiconductor layer and the part of the field plate insulating film.
6. The device according to claim 1 , wherein a second semiconductor layer of the second conductivity type is further provided between the first semiconductor layer and the first major electrode.
7. A semiconductor transistor device, comprising:
a first semiconductor layer of a first conductivity type;
a plurality of base regions of a second conductivity type provided on a surface of the first semiconductor layer;
a source region of the first conductivity type provided on a first portion of the surface of each of the base regions;
a first major electrode electrically connected to the first semiconductor layer;
a second major electrode electrically connected to the source region;
a gate electrode provided via a gate insulating film in each of a pair of trenches that extend from a surface of the source region into the first semiconductor layer; and
a field plate electrode provided via a field plate insulating film in each of trenches, wherein
a thickness of the field plate insulating film is greater than a thickness of the gate insulating film, and
no part of the source region lies directly above a portion of the first semiconductor layer between the pair of trenches that has the narrowest width.
8. The semiconductor transistor device of claim 7 , further comprising:
a contact region of the second conductivity type provided on a second portion of the surface of each of the base regions, wherein
an impurity concentration in the contact region is higher than an impurity concentration in the base region.
9. The semiconductor transistor device of claim 8 , wherein the first portion and the second portion are adjacent.
10. The semiconductor transistor device of claim 9 , wherein a boundary between the first portion and the second portion lies directly above a portion of the field plate insulating film.