CMOS image sensor and fabricating method thereof

1. A method, comprising:

forming a transfer gate on a semiconductor substrate;

forming a first ion implantation region having a first conductivity type on a first side of the transfer gate;

forming a second ion implantation region having the first conductivity type on the first side of the transfer gate such that the second ion implantation region encloses the first ion implantation region;

forming a third ion implantation region having a second conductivity type along a surface of the semiconductor substrate such that the third ion implantation region extends from the first side of the transfer gate, through the first ion implantation region, and into the second ion implantation region; and

forming a floating diffusion region on a second side of the transfer gate.

2. The method of claim 1 , further comprising forming, on the first side of the transfer gate, a spacer that extends over a portion of the first ion implantation region, a portion of the second ion implantation region, and a portion of the third ion implantation region.

3. The method of claim 1 , wherein:

said forming a first ion implantation region comprises forming the first ion implantation region such that a first edge of the first ion implantation region aligns with the first side of the transfer gate; and

the method further comprises forming, on the first side of the transfer gate, a spacer that extends over a portion of the first ion implantation region and that includes an edge positioned between the first edge and a second edge of the first ion implantation region.

4. The method of claim 1 , wherein said forming a first ion implantation region comprises forming the first ion implantation region with a length that is substantially the same as a length of the transfer gate.

5. The method of claim 1 , wherein said forming a second ion implantation region comprises implanting with a greater ion dose than that used to form the first implantation region.

6. The method of claim 1 , further comprising:

forming a first mask that exposes a surface of the semiconductor substrate;

wherein said forming a first ion implantation regions includes implanting ions through the exposed surface of the semiconductor substrate.

7. The method of claim 6 , further comprising:

forming a second mask that exposes another surface of the semiconductor substrate;

wherein said forming a second ion implantation region and said forming a third ion implantation region includes implanting ions through the exposed another surface of the semiconductor substrate.

8. The method of claim 1 , wherein:

said forming a first ion implantation region and said forming a second ion implantation region comprise implanting n-type ions into the semiconductor substrate; and

said forming a third ion implantation region comprises implanting p-type ions into the semiconductor substrate.

9. A method, comprising:

forming a transfer gate on a semiconductor substrate;

implanting a first region having a first conductivity type through a first exposed surface area of the semiconductor substrate such that the first region is aligned with a first side of the transfer gate;

implanting a second region having the first conductivity type through a second exposed surface area of the semiconductor substrate such that the second region is aligned with the first side of the transfer gate and is wider and deeper than the first region;

implanting a third region having a second conductivity type through a third exposed surface area of the semiconductor substrate such that the third region is wider and shallower than the first region; and

forming a floating diffusion region in the semiconductor substrate on a second side of the transfer gate.

10. The method of claim 9 , further comprising forming, on the first side of the transfer gate, a spacer that extends over a portion of the first region, a portion of the second region, and a portion of the third region.

11. The method of claim 9 , wherein:

said implanting a first region comprises implanting ions of the first conductivity type such that a first edge of the first region aligns with the first side of the transfer gate; and

the method further comprises forming, on the first side of the transfer gate, a spacer that extends over a portion of the first region and that includes an edge positioned between the first edge and a second edge of the first region.

12. The method of claim 9 , wherein said implanting a first region comprises forming the first region with a length that is substantially the same as a length of the transfer gate.

13. The method of claim 9 , wherein said implanting a second region comprises implanting with a greater ion dose than that used to implant the first region.

14. The method of claim 9 , further comprising:

forming a first mask including an opening that exposes the first surface area of the semiconductor substrate;

wherein said implanting a first region includes implanting ions through the opening and into the semiconductor substrate.

15. The method of claim 14 , further comprising:

forming a second mask including an opening that exposes the second surface area with a larger area than first surface area exposed by the opening of the first mask;

wherein said implanting a second region and said implanting a third region includes implanting ions through the opening of the second mask and into the semiconductor substrate.

16. The method of claim 9 , wherein:

said implanting a first region and said implanting a second region comprise implanting n-type ions into the semiconductor substrate; and

said implanting a third region comprises implanting p-type ions into the semiconductor substrate.

17. A method, comprising:

forming a transfer gate on a semiconductor substrate;

forming a photodiode on a first side of the transfer gate; and

forming a floating diffusion region on a second side of the transfer gate;

wherein said forming a photodiode includes:

forming a first mask comprising a first opening aligned with the first side of the transfer gate;

implanting ions of a first conductivity type into the semiconductor substrate via the first opening of the first mask to form a first ion implantation region having a first depth;

forming a second mask comprising a second opening larger than the first opening and aligned with the first side of the transfer gate;

implanting ions of the first conductivity type into the semiconductor substrate via the second opening of the second mask to form a second ion implantation region having a second depth that is greater than the first depth; and

implanting ions of a second conductivity type into the semiconductor substrate via the second opening of the second mask to form a third ion implantation region along a surface of the semiconductor substrate that extends to a third depth that is less than the first depth.

18. The method of claim 17 , wherein:

said forming a second mask comprises exposing a surface of the semiconductor substrate via the second opening; and

said implanting ions to form a second ion implantation region and said implanting ions to form a third ion implantation region comprise implanting ions through the exposed surface of the semiconductor substrate.

19. The method of claim 17 , further comprising forming a spacer over both the first side of the transfer gate and the second side of the transfer gate.

20. The method of claim 17 , wherein said implanting ions to form a second ion implantation region comprises implanting with a greater ion dose than that used during said implanting ions to form the first implantation region.

21. The method of claim 17 , further comprising:

said implanting ions to form a first ion implantation region and said implanting ions to form a second ion implantation region include implanting n-type ions into an exposed surface of the semiconductor substrate; and

said implanting ions to form a third ion implantation region includes implanting p-type ions into the exposed surface of the semiconductor substrate.