IP Library Granted Patent US 8,330,185
Granted Patent B2
US 8,330,185 · App. 13/242,072 · Granted Dec 11, 2012

Semiconductor device having semiconductor substrate including diode region and IGBT region

Assignee: Toyota Jidosha Kabushiki Kaisha
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Quick Facts
Patent No.
US 8,330,185
App. No.
13/242,072
Granted
Dec 11, 2012
Kind
B2
Abstract

A semiconductor device, including a semiconductor substrate in which a diode region and an IGBT region are formed, is provided. A lifetime control region is formed within a diode drift region. The diode drift region and the IGBT drift region are a continuous region across a boundary region between the diode region and the IGBT region. A first separation region and a second separation region are formed within the boundary region. The first separation region is formed of a p-type semiconductor, formed in a range extending from an upper surface of the semiconductor substrate to a position deeper than both of a lower end of an anode region and a lower end of a body region, and bordering with the anode region. The second separation region is formed of a p-type semiconductor, formed in a range extending from the upper surface of the semiconductor substrate to a position deeper than both of the lower end of the anode region and the lower end of the body region, and bordering with the body region. The second separation region is separated from the first separation region.

Claims (19)

1. A semiconductor device comprising a semiconductor substrate in which a diode region and an IGBT region are formed, wherein

an anode region, a diode drift region, and a cathode region are formed within the diode region,

the anode region is formed of a p-type semiconductor and formed in a range including an upper surface of the semiconductor substrate,

the diode drift region is formed of an n-type semiconductor and formed under the anode region,

the cathode region is formed of an n-type semiconductor, which has a higher concentration of n-type impurities than that in the diode drift region, and formed in a range which is under the diode drift region and includes a lower surface of the semiconductor substrate,

an emitter region, a body region, an IGBT drift region, a collector region, and a gate electrode are formed within the IGBT region,

the emitter region is formed of an n-type semiconductor and formed in a range including the upper surface of the semiconductor substrate,

the body region is formed of a p-type semiconductor and formed in a range under the emitter region and a range including an upper surface of the semiconductor substrate,

the IGBT drift region is formed of an n-type semiconductor, formed under the body region, and separated from the emitter region by the body region,

the collector region is formed of a p-type semiconductor and formed in a range which is under the IGBT drift region and includes a lower surface of the semiconductor substrate,

the gate electrode is facing a range of the body region via an insulating film, wherein the range of the body region is a range separating the emitter region from the IGBT drift region,

a lifetime control region is formed within the diode drift region, wherein a carrier lifetime in the lifetime control region is shorter than that in the diode drift region outside the lifetime control region,

the diode drift region and the IGBT drift region are a continuous region across a boundary region between the diode region and the IGBT region,

a first separation region, a second separation region, and an n-type region are formed within the boundary region,

the first separation region is formed of a p-type semiconductor, formed in a range extending from the upper surface of the semiconductor substrate to a position deeper than both of a lower end of the anode region and a lower end of the body region, and bordering with the anode region,

the second separation region is formed of a p-type semiconductor, formed in a range extending from the upper surface of the semiconductor substrate to a position deeper than both of the lower end of the anode region and the lower end of the body region, and bordering with the body region,

the n-type region is formed of an n-type semiconductor, formed between the first separation region and the second separation region, and separating the first separation region from the second separation region, and

an end of the lifetime control region on a side of the IGBT region is located under the first separation region.

2. A semiconductor device of claim 1 , further comprising a third separation region which is formed of a p-type semiconductor, formed in a range extending from the upper surface of the semiconductor substrate to a position deeper than both of the lower end of the anode region and the lower end of the body region, formed between the first separation region and the second separation region, and separated from both of the first separation region and the second separation region by the n-type region.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 1, 2020
From: TOYOTA JIDOSHA KABUSHIKI KAISHA
To: DENSO CORPORATION
Reel/Frame 052281/0019 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 28, 2011
From: SOENO, AKITAKA
To: TOYOTA JIDOSHA KABUSHIKI KAISHA
Reel/Frame 027287/0880 →
Continuity (2)
Continuation PCTJP2009066000 · Sep 14, 2009
Related Publication 20120007141A1 · Jan 12, 2012