IP Library Granted Patent US 9,245,966
Granted Patent B2
US 9,245,966 · App. 13/242,257 · Granted Jan 26, 2016

Wiring, thin film transistor, thin film transistor panel and methods for manufacturing the same

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Quick Facts
Patent No.
US 9,245,966
App. No.
13/242,257
Granted
Jan 26, 2016
Kind
B2
Abstract

A thin film transistor includes a gate electrode, a gate insulating layer on the gate electrode, a semiconductor on the gate insulating layer, and a drain electrode and a source electrode on the semiconductor and spaced apart from each other. Each of the drain electrode and the source electrode includes a first metal diffusion preventing layer which prevents diffusion of metal atoms, and a second metal diffusion preventing layer on the first metal diffusion preventing layer. At least one of the first and second metal diffusion preventing layers includes grains in a columnar structure, which are in a direction substantially perpendicular to a lower layer. First grain boundaries of the first metal diffusion preventing layer and second grain boundaries of the second metal diffusion preventing layer are substantially discontinuous in a direction perpendicular to the semiconductor.

Claims (32)

1. A thin film transistor comprising:

a gate electrode;

a gate insulating layer on the gate electrode;

a semiconductor on the gate insulating layer;

a drain electrode and a source electrode on the semiconductor and spaced apart from each other; and

each of the drain electrode and the source electrode comprises:

a first metal diffusion preventing layer on the gate insulating layer, wherein the first metal diffusion preventing layer prevents diffusion of metal atoms, and

a second metal diffusion preventing layer on the first metal diffusion preventing layer;

wherein

at least one of the first and second metal diffusion preventing layers includes grains in a columnar structure which are in a direction substantially perpendicular to the semiconductor,

any of the first and second metal diffusion preventing layers contains polycrystalline titanium, the polycrystalline titanium having a plasma-treated surface layer of a titanium oxide (TiOx) amorphous structure, and

first grain boundaries of the first metal diffusion preventing layer and second grain boundaries of the second metal diffusion preventing layer are substantially discontinuous in a direction perpendicular to the semiconductor, the first and second metal diffusion preventing layers having the plasma-treated surface layer of the titanium oxide (TiOx) amorphous structure therebetween.

2. The thin film transistor of claim 1 , wherein each of the drain electrode and the source electrode further comprises a main electrode layer including copper (Cu), the first and second metal diffusion preventing layers between the semiconductor and the main electrode layer.

3. The thin film transistor of claim 1 , wherein each of the first and second metal diffusion preventing layers is about 50 Å to about 500 Å thick.

4. The thin film transistor of claim 1 , wherein the first metal diffusion preventing layer is in direct contact with the semiconductor.

5. The thin film transistor of claim 4 , further comprising a linear ohmic contact material on the semiconductor, wherein the first metal diffusion preventing layer is in direct contact with the linear ohmic contact material.

6. The thin film transistor of claim 1 , wherein the first metal diffusion preventing layer is titanium (Ti).

7. The thin film transistor of claim 1 , wherein the second metal diffusion preventing layer includes titanium (Ti).

8. A thin film transistor panel comprising:

a gate electrode connected to a gate wiring on an insulating substrate;

a gate insulating layer on the gate electrode;

a semiconductor on the gate insulating layer;

a drain electrode and a source electrode on the semiconductor and spaced apart from each other; and

a pixel electrode connected to the drain electrode and the source electrode;

wherein each of the drain electrode and the source electrode includes a first metal diffusion preventing layer, a second metal diffusion preventing layer, and a source-drain layer on the second metal diffusion preventing layer; and

wherein

at least one of the first and second metal diffusion preventing layers includes grains in a columnar structure, which are in a direction substantially perpendicular to the semiconductor,

any of the first and second metal diffusion preventing layers contains polycrystalline titanium, the polycrystalline titanium having plasma-treated surface layer of a titanium oxide (TiOx) amorphous structure, and

first grain boundaries of the first metal diffusion preventing layer and second grain boundaries of the second metal diffusion preventing layer are substantially discontinuous in a direction perpendicular to the semiconductor, the first and second metal diffusion preventing layers having the plasma-treated surface layer of the titanium oxide (TiOx) amorphous structure therebetween.

9. The thin film transistor panel of claim 8 , wherein the first metal diffusion preventing layer is between the semiconductor and the second metal diffusion preventing layer.

10. The thin film transistor panel of claim 9 , wherein the first and second metal diffusion preventing layers include titanium (Ti), and the source-drain layer includes copper (Cu).

11. The thin film transistor panel of claim 10 , wherein each of the first and second metal diffusion preventing layers includes the grains in a columnar structure.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 11, 2012
From: SAMSUNG ELECTRONICS CO., LTD.
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 029151/0055 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 17, 2011
From: PARK, JAE-WOO; CHO, SUNG-HAENG; KIM, KYONG-SUB; CHO, DONG-YEON
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 027071/0728 →