IP Library Granted Patent US 8,377,758
Granted Patent B2
US 8,377,758 · App. 13/242,468 · Granted Feb 19, 2013

Thin film transistor, array substrate and method for manufacturing the same

Inventors: Xinxin Li (Beijing, CN); Wei Wang (Beijing, CN); Chunping Long (Beijing, CN)
Assignee: Beijing Boe Optoelectronics Technology Co., Ltd.
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Quick Facts
Patent No.
US 8,377,758
App. No.
13/242,468
Granted
Feb 19, 2013
Kind
B2
Abstract

A thin film transistor for a thin film transistor liquid crystal display (TFT-LCD), an array substrate and manufacturing method thereof are provided. The thin film transistor comprises a source electrode, a drain electrode, and a channel region between the source electrode and drain electrode. A source extension region is connected with the source electrode, a drain extension region is connected with the drain electrode, and the source extension region is disposed opposite to the drain extension region to form a channel extension region therebetween.

Claims (7)

1. A method of manufacturing a thin film transistor array substrate, comprising the step of forming the thin film transistor on the substrate as the switch device of the pixel unit, the thin film transistor comprising a source electrode connected to a pixel electrode and that extends over a gate line, a drain electrode connected to a data line and having a U-type shape, and a channel region between the source electrode and the drain electrode, the method comprising:

forming a source extension region on the source electrode that connects to the pixel electrode through the source electrode, wherein the source extension region extends perpendicular to and crosses over the source electrode to form a cross-type shape, and

forming a drain extension region at both ends of the U-type shaped drain electrode and extending outwards therefrom, wherein the drain extension region is disposed opposite the source extension region to form a channel extension region therebetween;

wherein the source extension region and the drain extension region extend over the gate line in a direction parallel to the extension direction of the gate line on the substrate, and wherein the source extension region and the source electrode vertically intersect with each other and form an integrated structure together.

2. The method according to claim 1 wherein the channel extension region is in a straight bar shape.

3. The method according to claim 1 , wherein the source extension region and the drain extension region are in a zigzag shape.

4. The method according to claim 1 , wherein a material for the source electrode, the drain electrode, the source extension region, and the drain extension region is selected from the group consisting of AlNd, Al, Cu, Mo, MoW, Cr and any combination thereof.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 22, 2015
From: BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD
To: BOE TECHNOLOGY GROUP CO., LTD.; BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO. LTD
Reel/Frame 036644/0601 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 23, 2012
From: LI, XINXIN; WANG, WEI; LONG, CHUNPING
To: BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
Reel/Frame 028833/0627 →
Priority Claims (1)
CN 2007 1 0099777 · May 30, 2007 · national
Continuity (2)
Division 12104575 · Apr 17, 2008
Related Publication 20120009708A1 · Jan 12, 2012