Discrete digital receiver with FTBPF
View Patent ↗A receiver includes an antenna interface, a frequency translation bandpass filter (FTBPF), a sample and hold module, and a down conversion module. The antenna interface is operable to receive a received wireless signal from an antenna structure and to isolate the received wireless signal from another wireless signal. The FTBPF is operable to filter the received wireless signal to produce an inbound wireless signal. The sample and hold module is operable to sample and hold the inbound wireless signal in accordance with an S&H clock signal to produce a frequency domain sample pulse train. The down conversion module is operable to convert the frequency domain sample pulse train into an inbound baseband signal.
1. A receiver comprises:
antenna interface operable to receive a received wireless signal from an antenna structure;
a frequency translated bandpass filter (FTBPF) operable to filter the received wireless signal to produce an inbound wireless signal, wherein the FTBPF includes:
a plurality of baseband impedances that has a baseband frequency response; and
a switching network operably coupled to the plurality of baseband impedances to frequency translate the baseband frequency response to a wireless frequency response;
a sample and hold module operable to sample and hold the inbound wireless signal in accordance with an S&H clock signal to produce a frequency domain sample pulse train; and
down conversion module operable to convert the frequency domain sample pulse train into an inbound baseband signal.
2. The receiver of claim 1 , wherein the antenna interface comprises at least one of:
an antenna tuning unit;
an impedance matching circuit;
a transformer balun;
a transmit-receive switch; and
a transmit-receive isolation module.
3. The receiver of claim 1 , wherein the down conversion module comprises:
a discrete time filter module operable to filter the frequency domain sample pulse train to produce a wireless frequency pulse;
a wireless frequency to baseband conversion module operable to convert the wireless frequency pulse to a baseband signal; and
an analog to digital conversion module operable to convert the baseband signal into the inbound baseband digital signal.
4. The receiver of claim 1 , wherein the down conversion module comprises:
a second FTBPF operable to filter the frequency domain sample pulse train to produce a wireless frequency pulse;
a wireless frequency to baseband conversion module operable to convert the wireless frequency pulse to a baseband signal; and
an analog to digital conversion module operable to convert the baseband signal into the inbound baseband digital signal.
5. The receiver of claim 1 , wherein the down conversion module comprises:
a discrete time filter module operable to filter the frequency domain sample pulse train to produce a baseband signal; and
an analog to digital conversion module operable to convert the baseband digital signal into the inbound baseband signal.
6. The receiver of claim 1 further comprises:
a clock generation circuit including:
a clock generation module operable to generate a system clock signal;
a sample and hold clock module operable to generate, from the system clock signal, the S&H clock signal at a rate corresponding to a bandwidth the inbound wireless signal;
an FTBPF clock module operable to generate a filter clock signal from the system clock signal; and
a down conversion clock module operable to generate a conversion clock signal from the system clock signal.
7. The receiver of claim 6 further comprises:
a processing module operable to generate a control signal to adjust one or more of the system clock signal, the S&H clock signal, the filter clock signal, and the conversion clock signal.
8. The receiver of claim 1 , wherein the plurality of baseband impedances comprises:
a plurality of adjustable baseband impedances, wherein a control signal adjusts impedances of the plurality of adjustable baseband impedances to adjust properties of the baseband frequency response.
9. A receiver comprises:
a sample and hold module operable to sample and hold an inbound wireless signal in accordance with an S&H clock signal to produce a frequency domain sample pulse train;
a frequency translated bandpass filter (FTBPF) operable to filter the frequency domain sample pulse train to produce a filtered sample pulse, wherein the FTBPF includes:
a plurality of baseband impedances that has a baseband frequency response; and
a switching network operably coupled to the plurality of baseband impedances to frequency translate the baseband frequency response to a wireless frequency response; and
a down conversion module operable to convert the filtered sample pulse into an inbound baseband signal.
10. The receiver of claim 9 , wherein the down conversion module comprises:
a wireless frequency to baseband conversion module operable to convert the wireless frequency pulse to a baseband signal; and
an analog to digital conversion module operable to convert the baseband signal into the inbound baseband digital signal.
11. The receiver of claim 9 , wherein the down conversion module comprises:
a discrete time filter module operable to filter the frequency domain sample pulse train to produce a baseband signal; and
an analog to digital conversion module operable to convert the baseband digital signal into the inbound baseband signal.
12. The receiver of claim 9 further comprises:
a clock generation circuit including:
a clock generation module operable to generate a system clock signal;
a sample and hold clock module operable to generate, from the system clock signal, the S&H clock signal at a rate corresponding to a multiple of a carrier frequency of the inbound wireless signal;
an FTBPF clock module operable to generate a filter clock signal from the system clock signal; and
a down conversion clock module operable to generate a conversion clock signal from the system clock signal.
13. The receiver of claim 12 further comprises:
a processing module operable to generate a control signal to adjust one or more of the system clock signal, the S&H clock signal, the filter clock signal, and the conversion clock signal.
14. The receiver of claim 9 , wherein the plurality of baseband impedances comprises:
a plurality of adjustable baseband impedances, wherein a control signal adjusts impedances of the plurality of adjustable baseband impedances to adjust properties of the baseband frequency response.
15. A receiver comprising:
an antenna assembly;
an antenna interface coupled to the antenna assembly;
a sample and hold module coupled to the antenna interface configured to sample and hold an inbound wireless signal in accordance with an S&H clock signal to produce a frequency domain sample pulse train;
a frequency translated bandpass filter (FTBPF) operable to filter the frequency domain sample pulse train to produce a filtered sample pulse, wherein the FTBPF includes:
a plurality of baseband impedances that has a baseband frequency response; and
a switching network operably coupled to the plurality of baseband impedances to frequency translate the baseband frequency response to a wireless frequency response; and
a down conversion module operable to convert the filtered sample pulse into an inbound baseband signal.
16. The receiver of claim 15 , wherein the down conversion module comprises:
a wireless frequency to baseband conversion module operable to convert the wireless frequency pulse to a baseband signal; and
an analog to digital conversion module operable to convert the baseband signal into the inbound baseband digital signal.
17. The receiver of claim 15 , wherein the down conversion module comprises:
a discrete time filter module operable to filter the frequency domain sample pulse train to produce a baseband signal; and
an analog to digital conversion module operable to convert the baseband digital signal into the inbound baseband signal.
18. The receiver of claim 15 further comprising:
a clock generation circuit including:
a clock generation module operable to generate a system clock signal;
a sample and hold clock module operable to generate, from the system clock signal, the S&H clock signal at a rate corresponding to a multiple of a carrier frequency of the inbound wireless signal;
an FTBPF clock module operable to generate a filter clock signal from the system clock signal; and
a down conversion clock module operable to generate a conversion clock signal from the system clock signal.
19. The receiver of claim 18 , further comprising:
a processing module operable to generate a control signal to adjust one or more of the system clock signal, the S&H clock signal, the filter clock signal, and the conversion clock signal.
20. The receiver of claim 15 , wherein the plurality of baseband impedances comprising:
a plurality of adjustable baseband impedances, wherein a control signal adjusts impedances of the plurality of adjustable baseband impedances to adjust properties of the baseband frequency response.