IP Library Granted Patent US 8,719,802
Granted Patent B2
US 8,719,802 · App. 13/249,298 · Granted May 6, 2014

Interprocedural exception method

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Quick Facts
Patent No.
US 8,719,802
App. No.
13/249,298
Granted
May 6, 2014
Kind
B2
Abstract

An interprocedural exception analysis and transformation framework for computer programming languages such as C++ that (1) captures the control-flow induced by exceptions precisely, and (2) transforms the given computer program into an exception-free program that is amenable for precise static analysis, verification, and optimizations.

Claims (58)

1. A computer implemented method for generating an interprocedural exception control flow graph (IECFG) for a computer program comprising the steps of:

building for each function within the computer program, an interprocedural exception flow graph that annotates an overapproximated set of signed types of exceptions for each exceptional control edge, and has exceptional exit and exceptional call-return nodes; and

performing an interprocedural exception analysis on the interprocedural graphs built thereby generating the IECFG;

wherein the overapproximated set signed types may include a positive set of exception types and a negative set of exception types, said negative set of exception types including every exception type other than those in the set.

2. The computer implemented method of claim 1 wherein the generated IECFG has nodes that represent exceptional returns from function calls, exceptional exits from functions, nodes which denote throwing and catching exceptions; and their associated sets of signed exception types.

3. The computer implemented method of claim 1 wherein the performing of the intraprocedural exception analysis may be terminated by a user at any well-defined point such that the result is an overapproximation of an actual set of exception types.

4. The computer implemented method of claim 1 further comprising the step of:

generating a list of uncaught exceptions in the computer program.

5. The computer implemented method of claim 1 further comprising the step of:

generating specifications related to exceptions for a function in the computer program.

6. The computer implemented method of claim 1 further comprising the steps of:

verifying that a function does not have any exceptions; and

outputting an indication that the function is without exceptions.

7. The computer implemented method of claim 1 further comprising the step of:

using the exception types in the IECFG for performing compiler optimizations.

8. The computer implemented method of claim 1 wherein the building of an intraprocedural exception graph for each function includes stack unwinding to destruct objects on the stack and handles multiple live exceptions that may arise.

9. A computer implemented method for rewriting a first computer program having exceptions into a second computer program wherein exceptional behavior is captured using non-exception constructs through the use of an interprocedural exception control flow graph (IECFG) comprising the steps of:

generating a set of local exception objects and a set of formal parameters for each function within the first computer program having exceptions;

converting constructs within the first computer program associated with exceptional nodes in the IECFG into non-exceptional constructs; and

outputting the second computer program which does not contain exceptional constructs;

wherein said IECFG annotates an overapproximated set signed types that may include a positive set of exception types and a negative set of exception types, said negative set of exception types including every exception type other than those in the set.

10. The computer implemented method of claim 9 further comprising the step of:

verifying that a function does not have any exceptions; and

outputting an indication that the function is without exceptions.

11. The computer implemented method of claim 10 further comprising the step of:

verifying that an exception path does not include any resource leaks; and

outputting an indication that the function is without resource leaks.

12. A system comprising:

a machine-readable storage device for storing instructions; and

data processing apparatus operable to execute the instructions and to perform operations for generating an interprocedural exception control flow graph (IECFG) for a computer program comprising the steps of:

building for each function within the computer program, an intraprocedural exception flow graph that annotates an overapproximated set of signed types of exceptions for each exceptional control edge, and has exceptional exit and exceptional call-return nodes; and

performing an interprocedural exception analysis on the interprocedural graphs built thereby generating the IECFG;

wherein the overapproximated set of signed types may include a positive set of exception types and a negative set of exception types, said negative set of exception types including every exception type other than those in the set.

13. The system of claim 12 wherein the generated IECFG has nodes that represent exceptional returns from function calls, exceptional exits from functions, nodes which denote throwing and catching exceptions; and their associated sets of signed exception types.

14. The system of claim 12 wherein the performing of the interprocedural exception analysis may be terminated by a user at any well-defined point such that the result is an overapproximation of an actual set of exception types.

15. The system of claim 12 further operable to execute the instructions and perform the step of:

generating a list of uncaught exceptions in the computer program.

16. The system of claim 12 further operable to execute the instructions and perform the step of:

generating specifications related to exceptions for a function in the computer program.

17. The system of claim 12 further operable to execute the instructions and perform the steps of:

verifying that a function does not have any exceptions; and

outputting an indication that the function is without exceptions.

18. The system of claim 12 further operable to execute the instructions and perform the step of:

using the exception types in the IECFG for performing compiler optimizations.

19. The system of claim 12 wherein the building of an intraprocedural exception graph for each function includes stack unwinding to destruct objects on the stack and handles multiple live exceptions that may arise.

20. A system comprising:

a machine-readable storage device for storing instructions; and

data processing apparatus operable to execute the instructions and to perform operations that rewrite a first computer program having exceptions into a second computer program wherein exceptional behavior is captured using non-exception constructs through the use of an interprocedural exception control flow graph (IECFG) comprising the steps of:

generating a set of local exception objects and a set of formal parameters for each function within the first computer program having exceptions;

converting constructs within the first computer program associated with exceptional nodes in the IECFG into non-exceptional constructs; and

outputting the second computer program which does not contain exceptional constructs;

wherein said IECFG annotates an overapproximated set signed types that may include a positive set of exception types and a negative set of exception types, said negative set of exception types including every exception type other than those in the set.

21. The system of claim 20 further operable to execute the instructions and perform the steps of:

verifying that a function does not have any exceptions; and

outputting an indication that the function is without exceptions.

22. The system of claim 20 further operable to execute the instructions and perform the steps of:

verifying that an exception path does not include any resource leaks; and

outputting an indication that the function is without resource leaks.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 13, 2015
From: NEC LABORATORIES AMERICA, INC.
To: NEC CORPORATION
Reel/Frame 034765/0565 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 7, 2011
From: MAEDA, NAOTO
To: NEC CORPORATION
Reel/Frame 027338/0952 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 7, 2011
From: PRABHU, PRAKASH; BALAKRISHNAN, GOGUL; IVANCIC, FRANJO; GUPTA, AARTI
To: NEC LABORATORIES AMERICA, INC.
Reel/Frame 027343/0013 →