IP Library Granted Patent US 8,650,633
Granted Patent B2
US 8,650,633 · App. 13/250,529 · Granted Feb 11, 2014

Integrated circuit for preventing chip swapping and/or device cloning in a host device

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Quick Facts
Patent No.
US 8,650,633
App. No.
13/250,529
Granted
Feb 11, 2014
Kind
B2
Abstract

An integrated circuit is disclosed that can be included in a host electronic device that can be commonly manufactured, where the integrated circuit can be designated (“locked”) for a specific manufacturer, thereby substantially reducing the likelihood that a third party will be able to successfully clone a host electronic device manufactured by the specific manufacturer and/or swap the chip containing the integrated circuit for one having more enabled features. The integrated circuit includes an ID module that can be programmed after fabrication. Components within the integrated circuit designate manufacturer-specific configurations (e.g., address mapping, pin routing and/or vital function releasing) based on the programmed manufacturer ID. As a result, once the integrated circuit has been programmed with the manufacturer ID, the integrated circuit will function correctly only within a host device manufactured by the manufacturer associated with the programmed manufacturer ID.

Claims (43)

1. An integrated circuit that is included in a host electronic device, comprising:

a plurality of pins;

a controller module configured to communicate with one or more off-chip electronics components via the plurality of pins; and

a clone prevention module configured to lock the integrated circuit to a specific manufacturer of the host electronic device, the clone prevention module including:

an addressing module configured to set at least one of an electronics component address and a pin configuration based on a manufacturer identification (ID) so as to route signals between the controller module and the plurality of pins based on the manufacturer ID.

2. The integrated circuit of claim 1 , wherein the clone prevention module is capable of being programmed to lock the integrated circuit to the specific manufacturer after fabrication of the integrated circuit has been completed.

3. The integrated circuit of claim 1 , wherein the clone prevention module includes an ID module configured to store the manufacturer ID associated with the specific manufacturer.

4. The integrated circuit of claim 3 , wherein the addressing module is an address map module configured to set an address map that defines the electronics component address based on the manufacturer ID stored in the ID module.

5. The integrated circuit of claim 4 , wherein the address map module stores, in a memory module, encrypted address maps corresponding to a plurality of possible manufacturers, and

wherein the address map module selects the address map by using the manufacturer ID as a decryption key for decrypting an encrypted address map corresponding to the specific manufacturer.

6. The integrated circuit of claim 4 , wherein the address map identifies addresses of electronics components within the host electronic device of the specific manufacturer.

7. The integrated circuit of claim 5 , further comprising a controller module configured to communicate with the electronics components based on the address map set by the address map module.

8. The integrated circuit of claim 1 , wherein the addressing module determines from the manufacturer ID that a first off-chip electronics component is connected to a first pin of the plurality of pins within an electronics apparatus of the specific manufacturer, and

wherein the addressing module routes signals sent from the controller module that are designated for the first off-chip electronics component to the first pin.

9. The integrated circuit of claim 1 , wherein the addressing module includes a plurality of multiplexers that route the signals using the manufacturer ID as a selection address.

10. The integrated circuit of claim 3 , wherein the clone prevention module includes a read-only memory (ROM) module configured to store first data corresponding to the specific manufacturer and second data corresponding to a second manufacturer.

11. The integrated circuit of claim 10 , wherein the ROM module hides the first data and the second data, and releases only the first data or the second data based on the manufacturer ID stored in the ID module.

12. The integrated circuit of claim 11 , wherein the ROM module releases the first data due to its association with the specific manufacturer based on the manufacturer ID stored in the ID module.

13. The integrated circuit of claim 10 , wherein the first data is a first application programming interface (API) and the second data is a second API.

14. An integrated circuit that is included in a host electronic device, comprising:

a clone prevention module configured to lock the integrated circuit to a specific manufacturer of the host electronic device,

wherein the clone prevention module includes an identification (ID) module configured to store a manufacturer ID associated with the specific manufacturer,

wherein the clone prevention module includes a read-only memory (ROM) module configured to store first data corresponding to the specific manufacturer and second data corresponding to a second manufacturer,

wherein the ROM module is a boot ROM,

wherein the first data is a first boot program located in a first region of the boot ROM, and

wherein the second data is a second boot program located in a second region of the boot ROM.

15. The integrated circuit of claim 14 , wherein the ROM module hides and releases one of the first region or the second region based on the manufacturer ID stored in the ID module.

16. A method of preventing device-swapping within an integrated circuit, comprising:

reading a manufacturer identification (ID) corresponding to a specific manufacturer from an ID module; and

configuring an operation of the integrated circuit based on the manufacturer ID so as to lock the integrated circuit to the specific manufacturer, the configuring including:

setting at least one of an electronics component address and a pin configuration based on the manufacturer ID;

defining a pin configuration based on the manufacturer ID; and

routing signals from the integrated circuit to a plurality of pins based on the defined pin configuration,

wherein the integrated circuit communicates with the plurality of pins.

17. The method of claim 16 , wherein the configuring includes determining an address map based on the manufacturer ID, and

wherein the address map identifies communication addresses of components within a host electronic device of the specific manufacturer.

18. The method of claim 16 , wherein the integrated circuit includes a read-only memory (ROM) that stores first data corresponding to the specific manufacturer and second data corresponding to a second manufacturer, and

wherein the configuring includes releasing only the data corresponding to the specific manufacturer based on the manufacturer ID.

19. A method of preventing device-swapping within an integrated circuit, comprising:

reading a manufacturer identification (ID) corresponding to a specific manufacturer from an ID module; and

configuring an operation of the integrated circuit based on the manufacturer ID so as to lock the integrated circuit to the specific manufacturer, the configuring including:

setting at least one of an electronics component address and a pin configuration based on the manufacturer ID; and

determining, based on the manufacturer ID, an address map that identifies communication addresses of components within a host electronics device of the specific manufacturer.

Assignments (7)
CORRECTIVE ASSIGNMENT TO CORRECT THE ERROR IN RECORDING THE MERGER IN THE INCORRECT US PATENT NO. 8,876,094 PREVIOUSLY RECORDED ON REEL 047351 FRAME 0384. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 8, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 049248/0558 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE OF THE MERGER PREVIOUSLY RECORDED AT REEL: 047230 FRAME: 0910. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047351/0384 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047230/0910 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 21, 2011
From: KOTHARI, LOVE; CHOU, PAUL
To: BROADCOM CORPORATION
Reel/Frame 027263/0228 →