IP Library Granted Patent US 8,649,255
Granted Patent B2
US 8,649,255 · App. 13/258,485 · Granted Feb 11, 2014

Device and method for fast fourier transform

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Quick Facts
Patent No.
US 8,649,255
App. No.
13/258,485
Granted
Feb 11, 2014
Kind
B2
Abstract

A device and a method for Fast Fourier Transform (FFT) are disclosed. The device includes a data receiving module, an address translation module, a data storage module, a FFT module, a data extraction module and a data output module. The data receiving module is configured to receive the input data. The address translation module is configured to duplicate M/N copies of the received data and then send them to the data storage module. The data storage module is configured to store the received data sent by the address translation module to M/N different addresses. The FFT module is configured to perform M-point FFT on the stored data. The data extraction module is configured to extract one point in every several points of the transformed data, and send the extracted data to the data output module. The data output module is configured to output the received data.

Claims (27)

1. A method for Fast Fourier Transform (FFT), the method comprising: duplicating M/N copies of input data and storing the M/N copies into M/N different addresses of a memory, then performing M-point FFT on stored data in a FFT unit, and extracting one point in every several points in transformed data and outputting extracted data, and said M being a maximum number of points in the FFT, N being a practical number of points in the input data, thus to implement multiplexing of the FFT, wherein M=2 n+j , N=2 n , n is a natural number greater than 0, j=0, 1, 2, M and N are integers.

2. The method of claim 1 , wherein,

before the storing step, the method also comprises: judging whether to perform the M-point FFT on the input data at first, and if yes, performing the M-point FFT on the input data directly and outputting the transformed data, otherwise, carrying out the storing step.

3. The method of claim 1 , wherein, when M=2N, the step of duplicating two copies of the input data and storing the two copies into two different memory addresses is: duplicating two copies of i th data and storing the two copies into the memory addresses i and N+i respectively; wherein i is a natural number, 0≦i≦N−1.

4. The method of claim 1 , wherein,

when M=4N, the step of duplicating four copies of the input data and storing the four copies into four different memory addresses is: duplicating four copies of i th data and storing the four copies into the memory addresses i, N+i, 2N+i, and 3N+i respectively, wherein i is a natural number , 0≦i≦N−1.

5. The method of claim 3 , wherein,

in the step of extracting one point in every several points in the transformed data, extract (2i) th data or (2i+1) th data, where 0≦i≦N−1.

6. The method of claim 4 , wherein,

in the step of extracting one point in every several points in the transformed data, extract (4i) th data, or (4i+1) th data, or (4i+2) th data or (4i+3) th data, where 0≦i≦N−1.

7. A device for Fast Fourier Transform (FFT), comprising: a data receiver, a data storage memory, a FFT unit, and a data output; said device also comprising a memory address translation unit and a data extraction unit;

said data receiver module being configured to: receive input data;

said address translation unit being configured to: duplicate M/N copies of received data and sending the copies to the data storage memory;

said data storage memory being configured to: store the received data sent from the memory address translation unit to M/N different addresses of the memory;

said FFT unit being configured to: perform M-point FFT on stored data;

said data extraction unit is configured to: extract one point in every several points in transformed data and sending extracted data to the data output;

said data output is configured to: output the received data;

said M being a maximum number of points in the FFT, and N being a practical number of points in the input data;

thereby, multiplexing of the FFT being completed; wherein M=2 n+j , N=2 n ,n is a natural number greater than 0, j=0, 1, 2, M and N are integers.

8. The device of claim 7 , wherein,

said device also comprises a judgment unit, and said judgment unit is configured to: after receiving data sent from the data receiver, judge whether to perform M-point FFT or not, and if yes, send the data to the storage memory, otherwise, send the data to the memory address translation unit.

9. The device of claim 7 , wherein,

said data storage memory is configured to: when M=2N, store duplicated i th data to the memory addresses i and N+i respectively; wherein i is a natural number, 0≦i≦N−1;

or, said data storage memory is configured to: when M=4N, store the duplicated i th data to the memory addresses i, N+i, 2N+i, and 3N+i respectively; wherein i is a natural number, 0≦i≦N−1.

10. The device of claim 9 , wherein,

said data extraction unit is configured to: when M=2N, extract (2i) th data or (2i+1) th data, where 0≦i≦N−1;

or, said data extraction unit is configured to: when M=4N, extract (4i) th data, or (4i+1) th data, or (4i+2) th data or (4i+3) th data, where 0≦i≦N−1.

Assignments (2)
CHANGE OF NAME Recorded May 3, 2017
From: ZTE MICROELECTRONICS TECHNOLOGY CO., LTD
To: SANECHIPS TECHNOLOGY CO., LTD.
Reel/Frame 042389/0938 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 20, 2015
From: ZTE CORPORATION
To: ZTE MICROELECTRONICS TECHNOLOGY CO. LTD
Reel/Frame 037095/0671 →