IP Library Granted Patent US 8,681,464
Granted Patent B2
US 8,681,464 · App. 13/265,009 · Granted Mar 25, 2014

Voltage suppressor component

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Quick Facts
Patent No.
US 8,681,464
App. No.
13/265,009
Granted
Mar 25, 2014
Kind
B2
Abstract

A voltage suppressor component including a semiconductor layer; a first port mounted on the semiconductor layer and configured to receive electrical power; a second port mounted on the semiconductor layer and configured to provide the electrical power, and a fuse in electrical series between the first port and the second port and mounted on the semiconductor layer.

Claims (31)

1. A voltage suppressor component comprising:

a semiconductor layer;

a first port mounted on the semiconductor layer and configured to receive electrical power;

a second port mounted on the semiconductor layer and configured to provide the electrical power,

a fuse in electrical series between the first port and the second port and mounted on the semiconductor layer; and

a polymer passivation layer between the fuse and the semiconductor layer.

2. A voltage suppressor component as claimed in claim 1 , further comprising a member, connected between the first port and the second port, and configured to suppress a voltage above a predetermined threshold voltage.

3. A voltage suppressor component as claimed in claim 2 , wherein the member is a transient voltage suppressor.

4. A voltage suppressor component as claimed in claim 2 , wherein the member includes a transient voltage suppression diode, connected between the first and second ports and ground, and configured to provide an electrical path to ground for a voltage above the predetermined threshold voltage, and wherein the transient voltage suppression diode is formed in the semiconductor layer.

5. A voltage suppressor component as claimed in claim 1 , wherein the second port is configured to connect to charging control circuitry and the voltage suppressor component is configured to suppress the voltage supplied to the charging control circuitry.

6. A voltage suppressor component as claimed in claim 1 , wherein the voltage suppressor component is a discrete electronic component that is configured to be incorporated into an apparatus.

7. A voltage suppressor component as claimed in claim 1 , wherein the polymer passivation layer is positioned adjacent a bottom surface of the fuse.

8. A voltage suppressor component as claimed in claim 1 , further comprising a semiconductor passivation layer between the semiconductor layer and the polymer passivation layer.

9. An apparatus comprising a voltage suppressor component as claimed in claim 1 .

10. A mobile cellular telephone comprising a voltage suppressor component as claimed in claim 1 .

11. Packaging comprising one or more voltage suppressor components as claimed in claim 1 .

12. A method comprising:

providing a voltage suppressor component as claimed in claim 1 incorporated in an apparatus;

providing an electrical test signal to the first port;

determining whether the voltage suppressor component is electrically connected within the apparatus.

13. A method as claimed in claim 12 , further comprising electrically connecting the voltage suppressor component within the apparatus if the voltage suppressor component is not electrically connected within the apparatus.

14. A method comprising:

providing a voltage suppressor component including a semiconductor layer, a first port mounted on the semiconductor layer and configured to receive electrical power, a second port mounted on the semiconductor layer and configured to provide the electrical power,

providing a fuse in electrical series between the first port and the second port and mounted on the semiconductor layer; and

providing a polymer passivation layer between the fuse and the semiconductor layer.

15. A method as claimed in claim 14 , further comprising providing a member between the first port and the second port, wherein the member is configured to suppress a voltage above a predetermined threshold voltage.

16. A method as claimed in claim 15 , wherein the member is a transient voltage suppressor.

17. A method as claimed in claim 15 , wherein the member includes a transient voltage suppression diode, connected between the first and second ports and ground, and configured to provide an electrical path to ground for a voltage above the predetermined threshold voltage and wherein the transient voltage suppression diode is formed in the semiconductor layer.

18. A method as claimed in claim 14 , further comprising configuring the second port to connect to charging control circuitry and the voltage suppressor component is configured to suppress the voltage supplied to the charging control circuitry.

19. A method as claimed in claim 14 , wherein the polymer passivation layer is positioned adjacent a bottom surface of the fuse.

20. A method as claimed in claim 14 , further comprising providing a semiconductor passivation layer between the semiconductor layer and the polymer passivation layer.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 24, 2015
From: NOKIA CORPORATION
To: NOKIA TECHNOLOGIES OY
Reel/Frame 035280/0093 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 5, 2011
From: NUMMILA, PASI OSKAR; TULONEN, JUHA KALEVI
To: NOKIA CORPORATION
Reel/Frame 027465/0560 →