Series connected flip chip LEDs with growth substrate removed
View Patent ↗LED layers are grown over a sapphire substrate. Individual flip chip LEDs are formed by trenching or masked ion implantation. Modules containing a plurality of LEDs are diced and mounted on a submount wafer. A submount metal pattern or a metal pattern formed on the LEDs connects the LEDs in a module in series. The growth substrate is then removed, such as by laser lift-off. A semi-insulating layer is formed, prior to or after mounting, that mechanically connects the LEDs together. The semi-insulating layer may be formed by ion implantation of a layer between the substrate and the LED layers. PEC etching of the semi-insulating layer, exposed after substrate removal, may be performed by biasing the semi-insulating layer. The submount is then diced to create LED modules containing series-connected LEDs.
1. A module containing a plurality of light emitting devices (LEDs), the module comprising:
electrically isolated individual LEDs, each LED including an N-layer, an active layer, and a P-layer;
a semi-insulating isolation layer common to the individual LEDs that mechanically couples together the individual LEDs and has a resistivity between 10 4 and 10 6 Ω-cm; and
a metal pattern that connects the individual LEDs, at least two of the LEDs being connected together in series.
2. The module of claim 1 wherein the individual LEDs are separated by trenches formed at least through the P-layer and active layer.
3. The module of claim 1 wherein the individual LEDs are separated by semi-insulating isolation regions formed by ion implantation.
4. The module of claim 1 including a submount that supports the module of individual LEDs.
5. The module of claim 4 wherein the submount includes at least a portion of the metal pattern that connects the individual LEDs.
6. The module of claim 1 wherein the metal pattern connects the individual LEDs in a combination of series and parallel connections.
7. The module of claim 1 wherein the metal pattern connects the individual LEDs in an anti-parallel configuration, such that portions of the individual LEDs are alternatively activated during alternating positive and negative cycles of a power source.
8. The module of claim 1 wherein a surface of the semi-isolating layer is etched.
9. The module of claim 1 including a wavelength conversion layer.
10. A module containing a plurality of light emitting devices (LEDs), the module comprising:
electrically isolated individual LEDs, each LED including an N-layer, an active layer, and a P-layer;
a semi-insulating isolation layer common to the individual LEDs that mechanically couples together the individual LEDs; and
a metal pattern that connects the individual LEDs, at least two of the LEDs being connected to ether in series
wherein the semi-insulating layer includes a semiconductor layer with defects in a crystalline structure of the semiconductor layer.
11. A module containing a plurality of light emitting devices (LEDs), the module comprising:
electrically isolated individual LEDs, each LED including an N-layer, an active layer, and a P-layer;
a semi-insulating isolation layer common to the individual LEDs that mechanically couples together the individual LEDs; and
a metal pattern that connects the individual LEDs, at least two of the LEDs being connected together in series,
wherein the semi-insulating layer includes an ion-implanted semiconductor layer.
12. A wafer comprising:
a plurality of modules, each module including a plurality of electrically isolated individual light emitting devices (LEDs) and a metal pattern that connects the individual LEDs, at least two of the LEDs being connected together in series; and
a semi-insulating isolation layer common to the plurality of modules that mechanically couples together the modules and has a resistivity between 10 4 and 10 6 Ω-cm.
13. The wafer of claim 12 wherein the individual LEDs are epitaxially grown over the semi-insulating layer.
14. The wafer of claim 12 wherein the semi-insulating layer is at least two microns thick.
15. The wafer of claim 12 wherein the semi-insulating layer is sufficiently conductive to support a photo-electrochemical etch process while being sufficiently insulating to prevent conduction between the individual LEDs.
16. The wafer of claim 12 wherein the semi-insulating layer includes a semi-insulating GaN layer.
17. The wafer of claim 12 wherein a surface of the semi-insulating layer is photo-electrochemically etched.
18. The wafer of claim 12 including a wavelength conversion layer.
19. A wafer comprising:
a plurality of modules, each module including a plurality of electrically isolated individual light emitting devices (LEDs) and a metal pattern that connects the individual LEDs at least two of the LEDs being connected together in series; and
a semi-insulating isolation layer common to the plurality of modules that mechanically couples together the modules, wherein the semi-insulating layer includes an ion-implanted semiconductor layer.