IP Library Granted Patent US 8,973,144
Granted Patent B2
US 8,973,144 · App. 13/272,830 · Granted Mar 3, 2015

System and method for kernel rootkit protection in a hypervisor environment

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Quick Facts
Patent No.
US 8,973,144
App. No.
13/272,830
Granted
Mar 3, 2015
Kind
B2
Abstract

A method includes creating a soft whitelist having an entry corresponding to a first guest kernel page in a guest operating system (OS) in a hypervisor environment including a hypervisor. The method also includes receiving an access attempt to a second guest kernel page, and generating a page fault when the access attempt is made to the second guest kernel page. In addition, the method includes determining that the second guest kernel page does not correspond to the entry in the soft whitelist, and denying an execution of the second guest kernel page if the second guest kernel page does not correspond to the entry in the soft whitelist.

Claims (68)

1. A method, comprising:

creating a soft whitelist having an entry corresponding to a first guest kernel page in a guest operating system (OS) in a hypervisor environment comprising a hypervisor;

receiving an access attempt to a second guest kernel page;

generating a page fault when the access attempt is made to the second guest kernel page;

determining whether the second guest kernel page corresponds to the entry in the soft whitelist;

fixing the page fault to allow an access and execution of the second guest kernel page if the second guest kernel page corresponds to the entry in the soft whitelist; and

denying an execution of the second guest kernel page if the second guest kernel page does not correspond to the entry in the soft whitelist.

2. The method of claim 1 , further comprising:

marking the first guest kernel page as read-only and executable if the page fault is an instruction page fault and the second guest kernel page corresponds to the entry in the soft whitelist.

3. The method of claim 1 , further comprising:

if the page fault is a data page fault and the second guest kernel page does not correspond to the entry in the soft whitelist:

fixing the page fault; and

marking the second guest kernel page as non-executable.

4. The method of claim 1 , wherein the creating the soft whitelist comprises adding a machine page frame number (MFN) corresponding to a virtual address of the first guest kernel page into a hash.

5. The method of claim 1 , further comprising:

marking a page table entry (PTE) corresponding to the first guest kernel page as NOT_PRESENT in a shadow page table of the hypervisor.

6. The method of claim 5 , wherein

the denying the execution comprises one of:

causing the guest OS to loop;

injecting an exception in the guest OS; or

fixing the page fault and pointing a corresponding PTE in the shadow page table to a crafted page instead of the second guest kernel page, wherein the crafted page comprises code that either causes the guest OS to crash or executes a set of No Operations (NOP) instructions.

7. The method of claim 1 , wherein the creating the soft whitelist is performed after the guest OS has loaded substantially all its kernel components at boot.

8. The method of claim 1 , wherein the creating the soft whitelist is performed before the guest OS has loaded substantially all its kernel components, and the first guest kernel page is from a paged pool range or a non-paged pool range.

9. The method of claim 1 , further comprising:

setting a lockdown feature bit in the hypervisor during domain creation to enable rootkit protection.

10. An apparatus, comprising:

a memory;

a processor; and

a hypervisor, such that the apparatus is configured for

creating a soft whitelist having an entry corresponding to a first guest kernel page in a guest operating system (OS) in a hypervisor environment comprising the hypervisor;

receiving an access attempt to a second guest kernel page;

generating a page fault when the access attempt is made to the second guest kernel page;

determining whether the second guest kernel page corresponds to the entry in the soft whitelist;

fixing the page fault to allow an access and execution of the second guest kernel page if the second guest kernel page corresponds to the entry in the soft whitelist; and

denying an execution of the second guest kernel page if the second guest kernel page does not correspond to the entry in the soft whitelist.

11. The apparatus of claim 10 , wherein the apparatus is further configured for:

marking the first guest kernel page as read-only and executable if the page fault is an instruction page fault and the second guest kernel page corresponds to the entry in the soft whitelist.

12. The apparatus of claim 10 , wherein the apparatus is further configured for:

if the page fault is a data page fault and the second guest kernel page does not correspond to the entry in the soft whitelist:

fixing the page fault; and

marking the second guest kernel page as non-executable.

13. The apparatus of claim 10 , wherein the creating the soft whitelist comprises adding a machine page frame number (MFN) corresponding to a virtual address of the first guest kernel page into a hash.

14. The apparatus of claim 10 , wherein

the denying the execution comprises one of:

causing the guest OS to loop;

injecting an exception in the guest OS; or

fixing the page fault and pointing a corresponding PTE in a shadow page table of the hypervisor to a crafted page instead of the second guest kernel page, wherein the crafted page comprises code that either causes the guest OS to crash or executes a set of No Operations (NOP) instructions.

15. Logic encoded in non-transitory media that includes code for execution and, when executed by a processor, is operable to perform operations comprising:

creating a soft whitelist having an entry corresponding to a first guest kernel page in a guest operating system (OS) in a hypervisor environment comprising a hypervisor;

receiving an access attempt to a second guest kernel page;

generating a page fault when the access attempt is made to the second guest kernel page;

determining whether the second guest kernel page corresponds to the entry in the soft whitelist;

fixing the page fault to allow an access and execution of the second guest kernel page if the second guest kernel page corresponds to the entry in the soft whitelist; and

denying an execution of the second guest kernel page if the second guest kernel page does not correspond to the entry in the soft whitelist.

16. The logic of claim 15 , the operations further comprising:

marking the first guest kernel page as read-only and executable if the page fault is an instruction page fault and the second guest kernel page corresponds to the entry in the soft whitelist.

17. The logic of claim 15 , the operations further comprising:

if the page fault is a data page fault and the second guest kernel page does not correspond to the entry in the soft whitelist:

fixing the page fault; and

marking the second guest kernel page as non-executable.

18. The logic of claim 15 , wherein the creating the soft whitelist comprises adding a machine page frame number (MFN) corresponding to a virtual address of the first guest kernel page into a hash.

19. The logic of claim 15 , the operations further comprising:

marking a PTE corresponding to the first guest kernel page as NOT_PRESENT in a shadow page table of the hypervisor.

20. The logic of claim 19 , wherein

the denying the execution comprises one of:

causing the guest OS to loop;

injecting an exception in the guest OS; or

fixing the page fault and pointing a corresponding PTE in the shadow page table to a crafted page instead of the second guest kernel page, wherein the crafted page comprises code that either causes the guest OS to crash or execute a set of No Operations (NOP) instructions.

Assignments (10)
CORRECTIVE ASSIGNMENT TO CORRECT THE THE PATENT TITLES AND REMOVE DUPLICATES IN THE SCHEDULE PREVIOUSLY RECORDED AT REEL: 059354 FRAME: 0335. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Jun 23, 2022
From: MCAFEE, LLC
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 060792/0307 →
SECURITY INTEREST Recorded Mar 3, 2022
From: MCAFEE, LLC
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT AND COLLATERAL AGENT
Reel/Frame 059354/0335 →
RELEASE OF INTELLECTUAL PROPERTY COLLATERAL - REEL/FRAME 045056/0676 Recorded Mar 2, 2022
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MCAFEE, LLC
Reel/Frame 059354/0213 →
RELEASE OF INTELLECTUAL PROPERTY COLLATERAL - REEL/FRAME 045055/0786 Recorded Oct 26, 2020
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MCAFEE, LLC
Reel/Frame 054238/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENT 6336186 PREVIOUSLY RECORDED ON REEL 045056 FRAME 0676. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Oct 22, 2020
From: MCAFEE, LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 054206/0593 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENT 6336186 PREVIOUSLY RECORDED ON REEL 045055 FRAME 786. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Oct 22, 2020
From: MCAFEE, LLC
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 055854/0047 →
SECURITY INTEREST Recorded Jan 12, 2018
From: MCAFEE, LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 045056/0676 →
SECURITY INTEREST Recorded Jan 12, 2018
From: MCAFEE, LLC
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 045055/0786 →
CHANGE OF NAME AND ENTITY CONVERSION Recorded Aug 24, 2017
From: MCAFEE, INC.
To: MCAFEE, LLC
Reel/Frame 043665/0918 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 13, 2011
From: DANG, AMIT; MOHINDER, PREET; SRIVASTAVA, VIVEK
To: MCAFEE, INC.
Reel/Frame 027057/0753 →