Liquid crystal display and method of driving the liquid crystal display
A liquid crystal display device (LCD), and a method of driving the LCD. The LCD includes: a display panel including a plurality of pixels defined as a plurality of gate lines and a plurality of data lines cross each other, wherein a storage capacitor of each of the plurality of pixels is connected to a front or rear gate line; a gate driver for generating a gate-on voltage by boosting a first input voltage in multi-stages, the gate-on voltage turns on a switching device of each of the plurality of pixels, and a gate-off voltage that turns off the switching device, and sequentially applying the gate-on voltage and the gate-off voltage to the plurality of gate lines; and a source driver for applying a data voltage to a data line connected to a pixel whose switching device is turned on.
1. A liquid crystal display device (LCD), comprising:
a display panel including a plurality of pixels defined as a plurality of gate lines and a plurality of data lines cross each other, wherein a storage capacitor of each of the plurality of pixels is connected to an adjacent gate line;
a gate driver to selectively supply a gate-on voltage and a gate-off voltage to each of the plurality of gate lines, the gate-on voltage for turning on a switching device of each of the plurality of pixels, and the gate-off voltage for turning off the switching device, wherein
the gate-on voltage is generated by boosting a first input voltage in multi-stages; and
a source driver to apply a data voltage to a data line connected to a pixel whose switching device is turned on, wherein:
the gate driver includes a gate-on voltage generator to generate the gate-on voltage, and
the gate-on voltage generator includes:
a first booster to generate a first boosting voltage by pumping the first input voltage;
a second booster to generate a second boosting voltage by pumping the first boosting voltage, the second boosting voltage being higher than the first boosting voltage; and
a third booster to generate a third boosting voltage by pumping the second boosting voltage, the third boosting voltage being higher than the second boosting voltage, wherein:
the second boosting voltage is pumped from the first boosting voltage, after a delay time of about 5 ms to 10 ms after the first boosting voltage is pumped, and
the third boosting voltage is pumped from the second boosting voltage, after a delay time of about 5 ms to 10 ms after the second boosting voltage is pumped, and is output as the gate-on voltage to each of the plurality of gate lines.
2. The LCD of claim 1 , wherein the gate driver further comprises a gate-off voltage generator to generate the gate-off voltage.
3. The LCD of claim 1 , wherein a difference between the first and second boosting voltages is below or equal to 1 V.
4. The LCD of claim 1 , wherein a difference between the second and third boosting voltages is below or equal to 1 V.
5. The LCD of claim 1 , wherein the gate-on voltage is generated via boosting three or more stages.
6. The LCD of claim 1 , wherein each of the plurality of pixels comprises:
a switching device including a gate electrode connected to a gate line, a source electrode connected to a data line, and a drain electrode connected to a pixel electrode;
a liquid crystal capacitor having one end connected to the pixel electrode, and charged by a potential difference between the pixel electrode and a common electrode; and
a storage capacitor having one end connected to the liquid crystal capacitor and another end connected to a front or rear gate line, and charged when the gate-on voltage is applied to the front or rear gate line.
7. The LCD of claim 1 , wherein the storage capacitor of each of the plurality of pixels is connected to the adjacent gate line corresponding to a gate line of an adjacent one of the plurality of pixels.
8. A liquid crystal display device (LCD), comprising:
a gate-on voltage generator to generate a gate-on voltage by boosting a first input voltage in multi-stages, the gate-on voltage for turning on a switching device of a pixel connected to a gate line; and
a gate-off voltage generator to generate a gate-off voltage by decompressing a second input voltage, and applying the gate-off voltage to the gate line, wherein
the gate-on voltage generator includes:
a first booster to generate a first boosting voltage by pumping the first input voltage;
a second booster to generate a second boosting voltage by pumping the first boosting voltage, the second boosting voltage being higher than the first boosting voltage; and
a third booster to generate a third boosting voltage by pumping the second boosting voltage, the third boosting voltage being higher than the second boosting voltage, wherein:
the second boosting voltage is pumped from the first boosting voltage, after a delay time of about 5 ms to 10 ms after the first boosting voltage is pumped, and
the third boosting voltage is pumped from the second boosting voltage, after a delay time of about 5 ms to 10 ms after the second boosting voltage is pumped, and is output as the gate-on voltage to the gate line.
9. The LCD of claim 8 , wherein a difference between the first and second boosting voltages is below or equal to 1 V.
10. The LCD of claim 8 , wherein a difference between the second and third boosting voltages is below or equal to 1 V.
11. The LCD of claim 8 , wherein the gate-on voltage is generated via boosting three or more stages.
12. A method of driving a liquid crystal display device (LCD), the method comprising:
generating a gate-on voltage by boosting a first input voltage in multi-stages;
applying the generated gate-on voltage to a gate line to turn on a switching device of a pixel; and
generating a gate-off voltage by decompressing a second input voltage, and applying the gate-off voltage to the gate line to turn off the switching device, wherein
the generating of the gate-on voltage includes:
generating a first boosting voltage by pumping the first input voltage;
generating a second boosting voltage by pumping the first boosting voltage, the second boosting voltage being higher than the first boosting voltage; and
generating a third boosting voltage by pumping the second boosting voltage, the third boosting voltage being higher than the second boosting voltage, wherein:
the second boosting voltage is pumped from the first boosting voltage, after a delay time of about 5 ms to 10 ms after the first boosting voltage is pumped, and
the third boosting voltage is pumped from the second boosting voltage, after a delay time of about 5 ms to 10 ms after the second boosting voltage is pumped, and is output as the gate-on voltage to the gate line.
13. The method of claim 12 , wherein a difference between the first and second boosting voltages is below or equal to 1 V.
14. The method of claim 12 , wherein a difference between the second and third boosting voltages is below or equal to 1 V.
15. The method of claim 12 , wherein the gate-on voltage is generated via boosting three or more stages.