IP Library Granted Patent US 8,274,207
Granted Patent B2
US 8,274,207 · App. 13/281,691 · Granted Sep 25, 2012

EL display panel, EL display apparatus, and method of manufacturing EL display panel

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Quick Facts
Patent No.
US 8,274,207
App. No.
13/281,691
Granted
Sep 25, 2012
Kind
B2
Abstract

An EL display panel including an EL unit and a thin film semiconductor unit, in which the EL unit includes an anode electrode, a cathode electrode, and a light-emitting layer, and the thin film semiconductor unit includes a substrate, a gate electrode, a gate insulating film, a semiconductor layer, a first electrode, a second electrode, an interlayer insulating film, a gate line formed above the interlayer insulating film, a power supply line formed above the interlayer insulating film, in a same layer as the gate line, and side-by-side with the gate line, and an auxiliary line formed above the interlayer insulating film, in a same layer as the gate line and the power supply line, and side-by-side with the gate line and the power supply line.

Claims (68)

1. An Electro Luminescence (EL) display panel comprising:

an EL unit; and

a thin film semiconductor unit configured to control luminescence at said EL unit,

wherein said EL unit includes:

an anode electrode; a cathode electrode; and a light-emitting layer interposed between said anode electrode and said cathode electrode,

said thin film semiconductor unit includes:

a substrate;

a gate electrode formed above said substrate;

a gate insulating film formed above said substrate to cover said gate electrode;

a semiconductor layer formed on said gate insulating film and above said gate electrode;

a first electrode formed above said semiconductor layer;

a second electrode formed in a same layer as said first electrode;

an interlayer insulating film formed (i) above said gate insulating film to cover said first electrode and said second electrode, and (ii) in a layer different from a layer in which said gate electrode is formed;

a gate line formed above said interlayer insulating film;

a power supply line formed above said interlayer insulating film on which said gate line is formed, in a same layer as said gate line, and side-by-side with said gate line; and

an auxiliary line formed above said interlayer insulating film, in a same layer as said gate line and said power supply line, and side-by-side with said gate line and said power supply line, and

said gate electrode and said gate line are electrically connected via a first conductive portion passing through said gate insulating film and said interlayer insulating film,

one of said first electrode and said second electrode is electrically connected to said power supply line via a second conductive portion passing through said interlayer insulating film, and

said auxiliary line is electrically connected to said cathode electrode.

2. The EL display panel according to claim 1 ,

wherein said power supply line and said auxiliary line are formed at a level identical to or within a predetermined approximate value from said gate line.

3. The EL display panel according to claim 1 ,

wherein said power supply line and said auxiliary line are arranged between said gate line and another gate line which is adjacent to and side-by-side with said gate line, and

a width of a combination of said power supply line and said auxiliary line corresponds to a width of an interval between the gate line and the other gate line which is adjacent to and side-by-side with said gate line, and

said power supply line and said auxiliary line are arranged in the proximity of the two adjacent gate lines to fill the interval between the two adjacent said gate lines.

4. The EL display panel according to claim 1 ,

wherein a distance from said gate line to said power supply line, a distance from said power supply line to said auxiliary line, and a distance from said auxiliary line to said gate line are 4 μm or greater.

5. The EL display panel according to claim 1 ,

wherein at least one of said power supply line and said auxiliary line is wider than a width of said gate line.

6. The EL display panel according to claim 1 ,

wherein said semiconductor layer is of P-channel type, and

said power supply line is arranged to overlap said semiconductor layer.

7. The EL display panel according to claim 1 ,

wherein said semiconductor layer is of N-channel type, and

said power supply line and said auxiliary line are arranged not to overlap said semiconductor layer.

8. The EL display panel according to claim 1 ,

wherein said first electrode is a source electrode, and

said second electrode is a drain electrode.

9. The EL display panel according to claim 1 ,

wherein said first electrode is a drain electrode, and

said second electrode is a source electrode.

10. The EL display panel according to claim 1 ,

wherein said semiconductor layer includes a polycrystalline semiconductor layer.

11. The EL display panel according to claim 1 ,

wherein material composing said power supply line and said auxiliary line includes one of Al, Cu, and Ag.

12. The EL display panel according to claim 1 ,

wherein said EL unit is an organic EL unit having an organic light-emitting layer as the light-emitting layer.

13. An EL display apparatus comprising

the EL display panel according to claim 1 .

14. A method of manufacturing an EL display panel, comprising:

a first process of preparing a substrate;

a second process of forming a gate electrode above the substrate;

a third process of forming a gate insulating film above said substrate to cover the gate electrode;

a fourth process of forming a semiconductor layer on the gate insulating film and above the gate electrode;

a fifth process of forming a first electrode above the semiconductor layer and forming a source line electrically connected to the first electrode, and a second electrode;

a sixth process of forming a first interlayer insulating film above the gate insulating film to cover the first electrode and the second electrode;

a seventh process of forming a first contact hole through the gate insulating film and the first interlayer insulating film;

an eighth process of forming a second contact hole through the first interlayer insulating film, the second contact hole passing through the first interlayer insulating film above the gate electrode and being different from the first contact hole;

a ninth process of forming, by forming a metal film on the first interlayer insulating film and patterning the metal film, (i) a gate line electrically connected to the gate electrode through the first contact hole, (ii) a power supply line electrically connected to the first electrode or the second electrode through the second contact hole and side-by-side with the gate line, and (iii) an auxiliary line side-by-side with the gate line and the power supply line and electrically connected to the cathode electrode;

a tenth process of forming a second interlayer insulating film to cover upper surfaces of the first interlayer insulating film, the power supply line, and the auxiliary line;

an eleventh process of forming a third contact hole through the second interlayer insulating film; and

a twelfth process of forming, above the second interlayer insulating film, an EL unit including a pair of an anode electrode and a cathode electrode, and a light-emitting layer interposed between the anode electrode and the cathode electrode,

wherein, in said twelfth process, the cathode electrode and the auxiliary line are electrically connected through the third contact hole.

15. The method of manufacturing an EL display panel according to claim 14 ,

wherein the semiconductor layer formed in said fourth process is a non-crystalline semiconductor film, and

said method further comprises, between said fourth process and fifth process, a process of crystallizing the non-crystalline semiconductor film by irradiating the non-crystalline semiconductor film with a laser to heat the non-crystalline semiconductor film to a predetermined temperature range.

16. The method of manufacturing an EL display panel according to claim 14 ,

wherein the EL unit is an organic EL unit having an organic light-emitting layer as the light-emitting layer.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 18, 2025
From: JDI DESIGN AND DEVELOPMENT G.K.
To: MAGNOLIA BLUE CORPORATION
Reel/Frame 072039/0656 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 31, 2024
From: JOLED, INC.
To: JDI DESIGN AND DEVELOPMENT G.K.
Reel/Frame 066382/0619 →
CORRECTION BY AFFIDAVIT FILED AGAINST REEL/FRAME 063396/0671 Recorded Jun 12, 2023
From: JOLED, INC.
To: JOLED, INC.
Reel/Frame 064067/0723 →
SECURITY INTEREST Recorded Apr 20, 2023
From: JOLED, INC.
To: INCJ, LTD.
Reel/Frame 063396/0671 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 12, 2015
From: PANASONIC CORPORATION
To: JOLED INC
Reel/Frame 035187/0483 →