IP Library Granted Patent US 8,334,705
Granted Patent B1
US 8,334,705 · App. 13/283,456 · Granted Dec 18, 2012

Analog circuitry to conceal activity of logic circuitry

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Quick Facts
Patent No.
US 8,334,705
App. No.
13/283,456
Granted
Dec 18, 2012
Kind
B1
Abstract

An integrated circuit comprises logic circuitry driven by a clock and reference circuitry. In operation, logic elements of the reference circuitry are synchronized to the clock. In operation, a first sensing circuit outputs a voltage V C proportional to an instantaneous current consumption I C of the logic circuitry, and a second sensing circuit outputs a voltage V R proportional to an instantaneous fluctuating current consumption I R of the reference circuitry. In operation, differential circuitry outputs a voltage difference αV R −V C between a scaled-up version αV R of the voltage V R and the voltage V C , the scaled-up version scaled to approximately the scale of the voltage V C . In operation, a square root circuit receives the voltage difference as input and outputs a square root of the voltage difference. A current source is controllable by the output of the square root circuit to generate current through a dissipative load.

Claims (15)

1. An integrated circuit comprising:

logic circuitry for performing one or more operations, the logic circuitry driven by a clock;

a first sensing circuit operable to output a voltage V C that is proportional to an instantaneous current consumption I C of the logic circuitry;

reference circuitry having one or more logic elements, wherein operation of the logic elements is synchronized to the clock;

a second sensing circuit operable to output a voltage V R that is proportional to an instantaneous fluctuating current consumption I R of the reference circuitry;

differential circuitry operable to output a voltage difference αV R −V C between a scaled-up version αV R of the voltage V R and the voltage V C , the scaled-up version αV R scaled to approximately the scale of the voltage V C ;

a square root circuit operable to receive the voltage difference as input and operable to output a square root of the voltage difference;

a dissipative load operable to dissipate an instantaneous power P L ; and

a controllable current source controllable by the output of the square root circuit for generating current through the dissipative load.

2. The integrated circuit as recited in claim 1 , wherein the logic elements comprise an inverter.

3. The integrated circuit as recited in claim 1 , wherein the differential circuitry comprises a differential amplifier.

4. The integrated circuit as recited in claim 1 , wherein the controllable current source comprises a voltage-to-current converter.

5. The integrated circuit as recited in claim 1 , wherein the logic circuitry performs one or more cryptographic operations.

6. The integrated circuit as recited in claim 1 , wherein the logic circuitry and the reference circuitry have approximately the same duty cycle of activity and inactivity.

7. The integrated circuit as recited in claim 1 , wherein the instantaneous power P L includes a portion that is proportional to the voltage V R , and the instantaneous power P L is less than the portion that is proportional to the voltage V R by an amount substantially equivalent to the instantaneous power P C to be dissipated by its respective one of the modules, whereby an instantaneous power sum P TOTAL of the instantaneous power P L and the instantaneous power P C is substantially proportional to the voltage V R .

Assignments (5)
NUNC PRO TUNC ASSIGNMENT Recorded Jun 19, 2023
From: BLACKBERRY LIMITED
To: MALIKIE INNOVATIONS LIMITED
Reel/Frame 064271/0199 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 16, 2023
From: BLACKBERRY LIMITED
To: MALIKIE INNOVATIONS LIMITED
Reel/Frame 064104/0103 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 2, 2019
From: CERTICOM CORP.
To: BLACKBERRY LIMITED
Reel/Frame 050610/0937 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 21, 2012
From: CERTICOM (U.S.) LIMITED
To: CERTICOM CORP.
Reel/Frame 027905/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 13, 2011
From: GUNNAM, KIRAN KUMAR; FULLER, JAY SCOTT
To: CERTICOM (U.S.) LIMITED
Reel/Frame 027371/0076 →