IP Library Granted Patent US 8,476,967
Granted Patent B2
US 8,476,967 · App. 13/292,451 · Granted Jul 2, 2013

Constant current circuit and reference voltage circuit

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Quick Facts
Patent No.
US 8,476,967
App. No.
13/292,451
Granted
Jul 2, 2013
Kind
B2
Abstract

Provided is a constant current circuit and a reference voltage circuit with improved line regulation without needing a start-up circuit. The constant current circuit includes: a constant current generation circuit including NMOS transistors and a resistor; a current mirror circuit including a pair of depletion mode NMOS transistors, for allowing a current of the constant current generation circuit to flow; and a feedback circuit for maintaining constant voltages of source terminals of the pair of depletion mode NMOS transistors.

Claims (19)

1. A constant current circuit, comprising:

a constant current generation circuit comprising NMOS transistors and a resistor;

a current mirror circuit comprising a pair of depletion mode NMOS transistors including gate terminals connected to each other, for allowing a current of the constant current generation circuit to flow; and

a feedback circuit for maintaining constant voltages of source terminals of the pair of depletion mode NMOS transistors.

2. A constant current circuit according to claim 1 , wherein the feedback circuit comprises a differential amplifier circuit including input terminals connected to the source terminals of the pair of depletion mode NMOS transistors, respectively, and an output terminal connected to the gate terminals of the pair of depletion mode NMOS transistors.

3. A constant current circuit according to claim 2 , wherein the constant current generation circuit comprises:

a first NMOS transistor including a drain terminal connected to an inverting input terminal of the differential amplifier circuit, and a source terminal connected to a ground terminal via the resistor; and

a second NMOS transistor including a gate terminal and a drain terminal which are connected to a non-inverting input terminal of the differential amplifier circuit and to a gate terminal of the first NMOS transistor, and a source terminal connected to the ground terminal.

4. A constant current circuit according to claim 2 , wherein:

the constant current generation circuit comprises:

a first NMOS transistor including a drain terminal connected to an inverting input terminal of the differential amplifier circuit, and a source terminal connected to a ground terminal; and

a second NMOS transistor including a gate terminal connected to a non-inverting input terminal of the differential amplifier circuit, and a drain terminal connected to a gate terminal of the first NMOS transistor; and

the resistor of the constant current generation circuit includes one terminal connected to the drain terminal of the second NMOS transistor, and another terminal connected to the non-inverting input terminal of the differential amplifier circuit.

5. A reference voltage circuit, comprising:

the constant current circuit according to claim 1 ; and

a voltage generation circuit provided to an output terminal of the constant current circuit.

6. A reference voltage circuit according to claim 5 , wherein:

the voltage generation circuit comprises a PMOS transistor, a resistor, and a diode, which are connected in series; and

the resistor included in the voltage generation circuit and the resistor included in the constant current generation circuit have the same temperature coefficient.

Assignments (5)
CHANGE OF ADDRESS Recorded Jun 8, 2023
From: ABLIC INC.
To: ABLIC INC.
Reel/Frame 064021/0575 →
CHANGE OF NAME Recorded Mar 12, 2018
From: SII SEMICONDUCTOR CORPORATION
To: ABLIC INC.
Reel/Frame 045567/0927 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EXECUTION DATE PREVIOUSLY RECORDED AT REEL: 037783 FRAME: 0166. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Feb 23, 2016
From: SEIKO INSTRUMENTS INC
To: SII SEMICONDUCTOR CORPORATION
Reel/Frame 037903/0928 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 11, 2016
From: SEIKO INSTRUMENTS INC
To: SII SEMICONDUCTOR CORPORATION .
Reel/Frame 037783/0166 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 9, 2011
From: KOBAYASHI, YUJI; IMURA, TAKASHI; SUGIURA, MASAKAZU; IGARASHI, ATSUSHI
To: SEIKO INSTRUMENTS INC.
Reel/Frame 027201/0239 →