Controlled quantum dot growth
View Patent ↗The present disclosure generally relates to techniques for controlled quantum dot growth as well as a quantum dot structures. In some examples, a method is described that includes one or more of providing a substrate, forming a defect on the substrate, depositing a layer on the substrate and forming quantum dots along the defect.
1. A quantum dot device comprising:
a substrate having a defect formed in a pattern along a surface of the substrate, wherein the defect is defined by a trench in the substrate and a material filling the trench in the substrate, wherein the material filling the trench in the substrate is a different material than a material of the substrate, and
a plurality of quantum dots positioned predominantly along the defect, wherein the quantum dot positions are based at least in part on the pattern.
2. The quantum dot device of claim 1 , wherein the material filling the trench in the substrate comprises germanium, wherein the material of the substrate comprises silicon, and wherein the quantum dots are on the material filling the trench.
3. The quantum dot device of claim 1 , wherein the defect has a square configuration and wherein the quantum dots are positioned at corners of the defect.
4. The quantum dot device of claim 1 , wherein the defect is arranged in a grid.
5. The quantum dot device of claim 1 , wherein the defect comprises a crystalline disorder of a material on a surface of the substrate.
6. The quantum dot device of claim 1 , wherein the trench has a first edge and a second edge, and wherein quantum dots are formed predominantly along the first edge and the second edge.
7. The quantum dot device of claim 1 , wherein the material of the substrate comprises silicon, and wherein the material filling the trench comprises germanium or germanium silicon.
8. The quantum dot device of claim 1 , wherein the quantum dots comprise a thin film layer having a thickness in a range between about 0.25 μm to about 2.5 μm.
9. A semiconductor device comprising:
a substrate having an at least partially unfilled trench formed below a surface of the substrate,
the trench having a width,
the trench having first and second edges spaced apart by the width of the trench; and
a plurality of quantum dots formed along the edges of the trench at the surface, wherein the quantum dots are substantially confined to the edges of the trench.
10. The semiconductor device of claim 9 , wherein the substrate comprises a first material and the trench is filled with a second material different from the first material.
11. The semiconductor device of claim 9 , wherein a width of the trench is greater than approximately 100 nm.
12. The semiconductor device of claim 9 , wherein a width of the trench is on the order of 2 μm
13. The semiconductor device of claim 9 , wherein the at least partially unfilled trench is a first trench, and wherein the substrate further comprises a second at least partially unfilled trench provided at an angle to the first trench.
14. The semiconductor device of claim 9 , wherein the at least partially unfilled trench is one of a plurality of trenches arranged in a pattern.
15. The semiconductor device of claim 9 , wherein the edges of the at least partially unfilled trench include a first edge and a second edge opposite the first edge, and wherein quantum dots are formed along the first and second edges.
16. The semiconductor device of claim 9 , wherein the at least partially unfilled trench is a first trench, the semiconductor device further comprises a second at least partially unfilled trench intersecting the first trench to define an intersection, and wherein quantum dots are formed at corners of the intersection.
17. The semiconductor device of claim 9 , further comprising a thin film layer deposited over the plurality of quantum dots, and a second set of quantum dots formed over the thin film layer.
18. The electrical device of claim 9 , further comprising a surface feature extending from a surface of the at least partially unfilled trench.