IP Library Granted Patent US 8,203,568
Granted Patent B2
US 8,203,568 · App. 13/298,266 · Granted Jun 19, 2012

Sharing a graphical processing unit between a plurality of programs

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Quick Facts
Patent No.
US 8,203,568
App. No.
13/298,266
Granted
Jun 19, 2012
Kind
B2
Abstract

A centralised server in a bank ( 50 ) of servers runs a program for use by a user at a remote terminal ( 52, 56, 58 ). In the server, a plurality of programs share a GPU and instructions are used to cause the GPU to store the frames representing graphics of different programs at different memory locations. The frames are compressed and transmitted to remote terminals. Optionally the invention also allows for GPU time slice allocation, such that the GPU completes rendering the frame of one program before it renders the frame of another program. Optionally the invention also allows delivering false information about the capabilities of the GPU to the programs.

Claims (26)

1. A method of sharing a graphics processing unit (GPU) between a plurality of programs, the method comprising the steps of:

a) outputting instructions by a first program of the plurality of programs to create a first set of instructions for generating a first frame;

b) outputting instructions by a second program of the plurality of programs to create a second set of instructions for generating a second frame;

c) providing control instructions to control how the GPU processes instructions of the first set of instructions and instructions of the second set of instructions;

d) processing at least part of the first set of instructions by the GPU to produce the first frame;

e) processing at least part of the second set of instructions by the GPU to produce the second frame;

f) signalling to an encoder when the GPU has completed rendering the first frame;

g) compressing at least part of the first frame by the encoder into a first compressed data signal and transmitting the first compressed data signal to a first remote processing device;

h) compressing at least part of the second frame by the encoder into a second compressed data signal and transmitting the second compressed data signal to a second remote processing device;

wherein the control instructions comprise instructions to cause the GPU to store a majority or all of the first frame in different GPU accessible memory locations than GPU accessible memory locations of the second frame.

2. The method as claimed in claim 1 , wherein the step of creating the first set of instructions further comprises a step of modifying the instructions outputted by the first program, and wherein the first set of instructions comprises the results of such modification.

3. The method as claimed in claim 2 , wherein the step of modifying comprises a step selected from a group of steps consisting of adding instructions, removing instructions, altering instructions, replacing instructions, and any combination thereof.

4. The method as claimed in claim 3 , wherein the control instructions further comprise instructions to control when the GPU processes instructions of the first set of instructions and instructions of the second set of instructions such that the GPU will not render the second frame until the GPU has completed rendering the first frame.

5. The method as claimed in claim 4 , wherein the control instructions further comprise wrapper instructions.

6. The method as claimed in claim 5 , further comprising the step of delivering information specifying at least one capability of the GPU to the first program, and wherein the information delivered differs at least in part from the actual capabilities of the GPU.

7. The method as claimed in claim 4 , further comprising the step of delivering information specifying at least one capability of the GPU to the first program, and wherein the information delivered differs at least in part from the actual capabilities of the GPU.

8. The method as claimed in claim 3 , wherein the control instructions further comprise wrapper instructions.

9. The method as claimed in claim 8 , further comprising the step of delivering information specifying at least one capability of the GPU to the first program, and wherein the information delivered differs at least in part from the actual capabilities of the GPU.

10. The method as claimed in claim 3 , further comprising the step of delivering information specifying at least one capability of the GPU to the first program, and wherein the information delivered differs at least in part from the actual capabilities of the GPU.

11. The method as claimed in claim 1 , wherein the control instructions further comprise instructions to control when the GPU processes instructions of the first set of instructions and instructions of the second set of instructions such that the GPU will not render the second frame until the GPU has completed rendering the first frame.

12. The method as claimed in claim 11 , wherein the control instructions further comprise wrapper instructions.

13. The method as claimed in claim 12 , further comprising the step of delivering information specifying at least one capability of the GPU to the first program, and wherein the information delivered differs at least in part from the actual capabilities of the GPU.

14. The method as claimed in claim 11 , further comprising the step of delivering information specifying at least one capability of the GPU to the first program, and wherein the information delivered differs at least in part from the actual capabilities of the GPU.

15. The method as claimed in claim 1 wherein the control instructions further comprise wrapper instructions.

16. The method as claimed in claim 15 , further comprising the step of delivering information specifying at least one capability of the GPU to the first program, and wherein the information delivered differs at least in part from the actual capabilities of the GPU.

17. The method as claimed in claim 1 , further comprising the step of delivering information specifying at least one capability of the GPU to the first program, and wherein the information delivered differs at least in part from the actual capabilities of the GPU.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 24, 2011
From: CLEMIE, GRAHAM; DUCKET, DEDRICK
To: T5 LABS LTD
Reel/Frame 027280/0109 →
Priority Claims (3)
GB 0204859.3 · Mar 1, 2002 · national
GB 0223687.5 · Oct 11, 2002 · national
GB 0226192.3 · Nov 9, 2002 · national
Continuity (3)
Continuation 13032401 · Feb 22, 2011
Continuation 10506151 · Aug 31, 2004
Related Publication 20120075317A1 · Mar 29, 2012