IP Library Granted Patent US 8,762,794
Granted Patent B2
US 8,762,794 · App. 13/299,578 · Granted Jun 24, 2014

Cross-layer system architecture design

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Quick Facts
Patent No.
US 8,762,794
App. No.
13/299,578
Granted
Jun 24, 2014
Kind
B2
Abstract

Methods and systems for cross-layer forgiveness exploitation include executing one or more applications using a processing platform that includes a first reliable processing core and at least one additional processing core having a lower reliability than the first processing core, modifying application execution according to one or more best-effort techniques to improve performance, and controlling parameters associated with the processing platform and the best-effort layer that control performance and error rate such that performance is maximized in a region of low hardware-software interference.

Claims (21)

1. A method for cross-layer forgiveness exploitation, comprising:

executing one or more applications using a processing platform that includes a first reliable processing core and at least one additional processing core having a lower reliability than the first processing core;

modifying application execution at application execution time, according to one or more best-effort techniques to improve performance; and

controlling parameters associated with the processing platform and the best-effort layer that control performance and error rate such that performance is maximized in a region of low hardware-software interferences;

wherein the first reliable processing core has a lower error rate than the at least one additional processing core;

wherein modifying further comprises partitioning computations of the one or more applications into guaranteed tasks and optional tasks; and

wherein executing comprises executing the guaranteed tasks on the first reliable processing core and executing the optional tasks on the at least one additional processing core;

wherein controlling parameters further comprises modulating one of operating voltage and frequency in the at least one additional processing core;

wherein partitioning further comprises subdividing guaranteed and optional tasks into tasklets, such that error checking and re-execution is performed on a per-tasklet basis.

2. The method of claim 1 , wherein executing further comprises ensuring correct execution of guaranteed tasks using software checks and re-execution.

3. The method of claim 1 , wherein controlling parameters further comprises modulating one of a rate of computation dropping and a rate of data dependency relaxation in the best-effort layer.

4. The method of claim 1 , wherein controlling parameters further comprises calculating an iso-error contour map and basing the parameters on said map.

5. A non-transitory computer readable storage medium comprising a computer readable program, wherein the computer readable program when executed on a computer causes the computer to:

execute one or more applications using a processing platform that includes a first reliable processing core and at least one additional processing core having a lower reliability than the first processing core;

modify application execution at application execution time, according to one or more best-effort techniques to improve performance; and

control parameters associated with the processing platform and the best-effort layer that control performance and error rate such that performance is maximized in a region of low hardware-software interference;

wherein the first reliable processing core has a lower error rate than the at least one additional processing core;

wherein modifying further comprises partitioning computations of the one or more applications into guaranteed tasks and optional tasks; and

wherein executing comprises executing the guaranteed tasks on the first reliable processing core and executing the optional tasks on the at least one additional processing core

wherein controlling parameters further comprises modulating one of operating voltage and frequency in the at least one additional processing core

wherein partitioning further comprises subdividing guaranteed and optional tasks into tasklets, such that error checking and re-execution is performed on a per-tasklet basis.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 13, 2015
From: NEC LABORATORIES AMERICA, INC.
To: NEC CORPORATION
Reel/Frame 034765/0565 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 18, 2011
From: CHAKRADHAR, SRIMAT; CHO, HYUNGMIN; RAGHUNATHAN, ANAND
To: NEC LABORATORIES AMERICA, INC.
Reel/Frame 027251/0923 →