Communication transceiver having a three-line balun with power amplifier bias
View Patent ↗A balun that includes a first conductor, a second conductor, and a third conductor. The first conductor has a first length. The first conductor also has a first end connected to a first balanced power amplifier output port. The second conductor has substantially the same first length. The second conductor also includes a first end connected to a second balanced power amplifier output port and a second end connected to a second end of the first conductor. The third conductor has substantially the same first length. The third conductor has a first end connected to an antenna port and a second end connected to a ground potential.
1. A balun circuit including a first port and a second port, the circuit comprising:
a first conductor, formed in a first metal layer of a multi-layer structure, the multi-layer structure including a plurality of metal layers, the first conductor having a first end connected to the first port;
a second conductor, formed in a second metal layer of the multi-layer structure, having a first end connected to the first conductor and a second end connected to the second port; and
a third conductor, formed in a third metal layer of the multi-layer structure, configured to couple signals between the third conductor and the second conductor.
2. The balun circuit of claim 1 , wherein the plurality of metal layers are interleaved by a plurality of insulating layers.
3. The balun circuit of claim 2 , wherein the plurality of insulating layers comprises:
a first insulating layer configured to separate a first ground plane and the first metal layer;
a second insulating layer configured to separate the first metal layer and the second metal layer;
a third insulating layer configured to separate the second metal layer and the third metal layer; and
a fourth insulating layer configured to separate the third metal layer and a second ground plane.
4. The balun circuit of claim 1 , further comprising:
a biasing network coupled to the first port.
5. The balun circuit of claim 4 , wherein the biasing network comprises:
a fourth conductor, formed in a first insulating layer of the multi-layer structure, configured to connect the first conductor and the second conductor.
6. The balun circuit of claim 1 , further comprising:
a fifth conductor, formed in a first insulating layer of the multi-layer structure, to connect the third conductor to a first ground plane.
7. The balun circuit of claim 1 , wherein a length of the first conductor is substantially equal to one-quarter wavelength of a selected center frequency.
8. The balun circuit of claim 1 , wherein the balun circuit comprises:
a fifth port, the third conductor having a first end connected to the fifth port.
9. The balun circuit of claim 1 , further comprising:
a transmitter coupled to the first and the second port, wherein the transmitter comprises:
a shunt switch coupled across the first port and the second port; and
a power amplifier having a positive potential output coupled to the first port and a negative potential output coupled to the second port, the shunt switch being configured to couple the positive potential output to the negative potential output when closed.
10. The balun circuit of claim 9 , wherein the shunt switch is configured to reflect a first phase shift of substantially 90 degrees and a second phase shift of substantially 90 degrees through the circuit when closed.
11. A circuit including a first port and a second port, the circuit comprising:
a first conductor, formed in a first metal layer of a multi-layer structure, the multi-layer structure including a plurality of metal layers, the first conductor having a first end connected to the first port;
a second conductor, formed in a second metal layer of the multi-layer structure, having a first end connected to the first conductor and a second end connected to the second port; and
a third conductor, formed in a third metal layer of the multi-layer structure, wherein the second metal layer is disposed between the first metal layer and the third metal layer.
12. The circuit of claim 11 , wherein the plurality of metal layers are interleaved by a plurality of insulating layers.
13. The circuit of claim 12 , wherein the plurality of insulating layers comprises:
a first insulating layer to separate a first ground plane and the first metal layer;
a second insulating layer to separate the first metal layer and the second metal layer;
a third insulating layer to separate the second metal layer and the third metal layer; and
a fourth insulating layer to separate the third metal layer and a second ground plane.
14. The circuit of claim 11 , further comprising:
a biasing network coupled to the first port.
15. The circuit of claim 14 , wherein the biasing network comprises:
a fourth conductor, formed in a first insulating layer of the multi-layer structure, to connect the first conductor and the second conductor.
16. The circuit of claim 11 , further comprising:
a fifth conductor, formed in a first insulating layer of the multi-layer structure, to connect the third conductor to a first ground plane.
17. The circuit of claim 11 , wherein a length of the first conductor is substantially equal to one-quarter wavelength of a selected center frequency.
18. The circuit of claim 11 , wherein the circuit comprises:
a fifth port, the third conductor having a first end connected to the fifth port.
19. The circuit of claim 11 , further comprising:
a receiver coupled to the first and the second port, wherein the receiver comprises:
a shunt switch coupled across the third port and the fourth port; and
a low noise amplifier having a positive potential input coupled to the third port and a negative potential input coupled to the fourth port, the shunt switch being configured to couple the positive potential input to the negative potential input when closed.
20. The circuit of claim 19 , wherein the shunt switch is configured to reflect a first phase shift of substantially 90 degrees and a second phase shift of substantially 90 degrees through the circuit when closed.