Techniques to reduce memory effect or inter-symbol interference (ISI) in circuits using op-amp sharing
View Patent ↗An amplifier system and method that eliminates memory effects due to amplifier sharing. The amplifier has a plurality of input stages. An input to be amplified is applied to one of the input stages of the amplifier, while the other input stages are turned off and reset. The inputs of the unused input stages are thus reset and equalized while the other input stage is turned on to receive the input to be amplified. An explicit reset phase is not needed.
1. An amplifier system comprising:
an amplifier having a plurality of input stages;
a controller that generates clock signals; and
a plurality of switch stages that are responsive to the clock signals, the plurality of switch stages being configured to: sample input signals and to turn off the input stages in a sampling mode; output a neutral voltage to the input stages in a recovery mode; and output sampled voltages to the input stages in an amplification mode, wherein when one of the switch stages is in the amplification mode, the other of the switch stages are in the sampling mode,
wherein the switch stages output a ground voltage to turn off the input stages during the sampling mode.
2. The amplifier system of claim 1 , wherein each of the input stages includes a differential transistor pair, and the voltages from the switch stages are connected to input terminals of the differential transistor pairs.
3. The amplifier system of claim 2 , wherein the neutral voltage is a common mode voltage that biases the input terminals to turn the differential transistor pairs on.
4. The amplifier system of claim 1 , wherein the ground voltage is additionally operable to equalize the input terminals during the sampling mode.
5. The amplifier system of claim 1 , wherein the controller outputs the clock signals so that a first of the switch stages is in the amplification mode during a first phase, and a second of the switch stages is in the amplification mode during a second phase following the first phase.
6. The amplifier system of claim 1 , comprising more than two input stages and more than two switch stages.
7. The amplifier system of claim 1 , wherein the amplifier is a telescopic operational amplifier.
8. An amplifier system comprising:
an amplifier having a plurality of input stages, each of the input stages including a differential transistor pair;
a controller that outputs clock signals; and
a plurality of switch stages that are responsive to the clock signals, the plurality of switch stages being configured to: sample input signals, and to turn off the differential transistor pairs and equalize the input terminals in a sampling mode; and output sampled voltages to the input stages in an amplification mode, wherein when one of the switch stages is in the amplification mode, the other of the switch stages are in the sampling mode,
wherein the switch stages are also responsive to the clock signals to output a neutral voltage that biases the input terminals to turn the differential transistor pairs on in a recovery mode.
9. The amplifier system of claim 8 , wherein the neutral voltage is a common mode voltage.
10. An amplifier system comprising:
an amplifier having a plurality of input stages, each of the input stages including a differential transistor pair;
a controller that outputs clock signals; and
a plurality of switch stages that are responsive to the clock signals, the plurality of switch stages being configured to: sample input signals, and to turn off the differential transistor pairs and equalize the input terminals in a sampling mode; and output sampled voltages to the input stages in an amplification mode, wherein when one of the switch stages is in the amplification mode, the other of the switch stages are in the sampling mode,
wherein the switch stages output a ground voltage to turn off the differential transistors during the sampling mode.
11. The amplifier system of claim 10 , wherein the controller outputs the clock signals so that a first of the switch stages is in the amplification mode during a first phase, and a second of the switch stages is in the amplification mode during a second phase following the first phase.
12. The amplifier system of claim 10 , comprising more than two input stages and more than two switch stages.
13. The amplifier system of claim 10 , wherein the amplifier is a telescopic operational amplifier.
14. A method of sharing an amplifier that has a plurality of input stages, the method comprising:
sampling input signals to provide sampled voltages;
connecting a first voltage to input terminals of the input stages to turn off the input stages and equalize the input terminals during said sampling;
connecting a neutral voltage to the input terminals of one of the input stages to bias the input terminals from the first voltage and turn on the input stage; and
connecting a sampled voltage to the input stage after the input stage is turned on to amplify the sampled voltage, while all of the other input stages are shut off.
15. The method of claim 14 , wherein a first sampled voltage is connected to a first input stage during a first phase, and a second sampled voltage is connected to a second input stage during a second phase following the first phase.
16. The method of claim 14 , wherein each of the input stages includes a differential transistor pair, and the voltages are connected to input terminals of the differential transistor pairs.
17. The method of claim 14 , wherein the neutral voltage is a common mode voltage.
18. The method of claim 14 , wherein the amplifier includes more than two input stages.
19. The method of claim 14 , wherein the first voltage is ground voltage.