Self aligned silicide device fabrication
View Patent ↗A method for fabricating a device includes forming a silicide layer on a substrate, forming a conductive layer over exposed portions of the substrate and the silicide layer, patterning and removing exposed portions of the conductive layer and the silicide layer with a first process, and patterning and removing exposed portions of the conductive layer with a second process.
1. A method for fabricating a device, the method comprising:
forming a silicide layer on a substrate;
forming a conductive layer over exposed portions of the substrate and the silicide layer;
patterning and removing exposed portions of the conductive layer and the silicide layer with a first process; and
patterning and removing exposed portions of the conductive layer with a second process, wherein removing exposed portions of the conductive layer with the second process includes a wet etching process that is substantially selective to the conductive layer.
2. The method of claim 1 , wherein the removing exposed portions of the conductive layer and the silicide layer with the first process includes an anisotropic etching process.
3. The method of claim 2 , wherein the anisotropic etching process includes a plasma etching process.
4. The method of claim 1 , wherein the silicide layer is formed by:
depositing a layer of silicide material on the substrate; and
annealing the layer of silicide material.
5. The method of claim 1 , wherein the silicide layer includes CrSi.
6. The method of claim 1 , wherein the substrate includes an insulator layer, wherein the silicide layer is formed on the insulator layer.
7. The method of claim 1 , wherein the conductive layer includes a metallic material.
8. A resistive device formed by the method of claim 1 .
9. A method for fabricating a device, the method comprising:
forming a silicide layer on a substrate;
forming a conductive layer over exposed portions of the silicide layer;
patterning a first mask material over a portion of the conductive layer;
removing exposed portions of the conductive layer and the silicide layer with a first process;
removing the first mask material;
patterning a second mask material over a portion of the conductive layer; and
removing exposed portions of the conductive layer with a second process, wherein removing exposed portions of the conductive layer with the second process includes a wet etching process that is substantially selective to the conductive layer.
10. The method of claim 9 , wherein the removing exposed portions of the conductive layer and the silicide layer with the first process includes an anisotropic etching process.
11. The method of claim 10 , wherein the anisotropic etching process includes a plasma etching process.
12. The method of claim 9 , wherein the method further comprises removing the second mask material following the removal of the exposed portions of the conductive layer.
13. The method of claim 9 , wherein the forming a conductive layer over exposed portions of the silicide layer includes forming the conductive layer over exposed features arranged on the substrate.
14. A resistive device formed by the method of claim 9 .