IP Library Granted Patent US 9,269,317
Granted Patent B2
US 9,269,317 · App. 13/307,440 · Granted Feb 23, 2016

Gate driving circuit and display apparatus having the same

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Quick Facts
Patent No.
US 9,269,317
App. No.
13/307,440
Granted
Feb 23, 2016
Kind
B2
Abstract

A liquid crystal display apparatus including a gate driving circuit disposed on a liquid crystal display is provided. The apparatus further includes a data driving chip, disposed on the liquid crystal display panel, to apply data driving signals to data lines. The gate driving circuit includes a plurality of stages connected to one another in parallel. The odd-numbered stages of the stages each apply gate driving signals to odd-numbered gate lines of the gate lines, in response to a first clock signal and the even-numbered stages of the stages each apply the gate driving signals to even-numbered gate lines of the gate lines, in response to a second clock signal having an opposite phase from a phase of the first clock signal.

Claims (25)

1. An electro-luminescent display apparatus, comprising:

an electro-luminescent display panel having a substrate including a display area and a peripheral area located adjacent to the display area, the display area comprising a series of gate lines arranged along a first direction, a series of data lines crossing the gate lines, and a plurality of pixels configured to be connected to the gate lines and the data lines,

a gate driving circuit located onto the peripheral area, comprising a series of stages arranged along the first direction and configured to supply gate signals to the gate lines in the display area, and

a data driving chip adhered to the substrate and located onto the peripheral area different from the location of the gate driving circuit, the data driving chip configured to supply data signals to the data lines and to supply a first clock signal and a second clock signal and a start signal to the gate driving circuit,

wherein the gate lines area divided into odd-numbered gate lines and even-numbered gate lines, and

wherein the stages are divided into odd-numbered stages connected to the odd-numbered gate lines and even-numbered stages connected to the even-numbered gate lines, the odd-numbered stages and the even-numbered stages are arranged from the first stage and second stage, respectively.

2. The electro-luminescent display apparatus of claim 1 , wherein the first stage and a last stage are configured to receive a start signal simultaneously.

3. The electro-luminescent display apparatus of claim 1 , wherein a first clock signal and a second clock signal reversed from the first clock signal are input from the data driving chip to the first stage and the second stage, respectively.

4. The electro-luminescent display apparatus of claim 3 , wherein the peripheral area comprising a first peripheral area where the gate driving circuit is located and a second peripheral area where the data driving chip is located, the second peripheral area is substantially perpendicular to the first peripheral area.

5. The electro-luminescent display apparatus of claim 3 , wherein the data driving chip comprises a series of signal receiving terminals, a series of data signal transmitting terminals facing the signal receiving terminals and gate control signal transmitting terminals configured to transmit the first and second clock signals and the start signal to the gate driving circuit.

6. The electro-luminescent display apparatus of claim 5 , wherein the gate control signal transmitting terminals are located next to the signal receiving terminals.

7. The electro-luminescent display apparatus of claim 3 , wherein the gate driving circuit is embedded to the substrate.

8. An electro-luminescent display apparatus, comprising:

an electro-luminescent display panel having a substrate including a display area and a peripheral area located adjacent to the display area, the display area comprising a series of gate lines arranged along a first direction, a series of data lines crossing the gate lines, and a plurality of pixels configured to be connected to the gate lines and the data lines,

a gate driving circuit located onto the peripheral area, comprising a series of stages arranged along the first direction and configured to supply gate signals to the gate lines in the display area, and

a data driving chip adhered to the substrate and located onto the peripheral area different from the location of the gate driving circuit, the data driving chip configured to supply data signals to the data lines and to supply a first clock signal and a second clock signal and a start signal to the gate driving circuit,

wherein the gate lines area divided into odd-numbered gate lines and even-numbered gate lines, and

wherein the stages are divided into odd-numbered stages connected to the odd-numbered gate lines and even-numbered stages connected to the even-numbered gate lines, the odd-numbered stages and the even-numbered stages are arranged from the first stage and second stage, respectively, and

wherein the first stage and a last stage are configured to receive the start signal.

9. The electro-luminescent display apparatus of claim 8 , wherein the first stage and a last stage are configured to receive a start signal simultaneously.

10. The electro-luminescent display apparatus of claim 8 , wherein a first clock signal and a second clock signal reversed from the first clock signal are input from the data driving chip to the first stage and the second stage, respectively.

11. The electro-luminescent display apparatus of claim 10 , wherein the peripheral area comprising a first peripheral area where the gate driving circuit is located and a second peripheral area where the data driving chip is located, the second peripheral area is substantially perpendicular to the first peripheral area.

12. The electro-luminescent display apparatus of claim 10 , wherein the data driving chip comprises a series of signal receiving terminals, a series of data signal transmitting terminals facing the signal receiving terminals and gate control signal transmitting terminals configured to transmit the first and second clock signals and the start signal to the gate driving circuit.

13. The electro-luminescent display apparatus of claim 12 , wherein the gate control signal transmitting terminals are located next to the signal receiving terminals.

14. The electro-luminescent display apparatus of claim 10 , wherein the gate driving circuit is embedded to the substrate.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 4, 2026
From: TCL CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
To: LONESTAR CRYSTAL DISPLAY LLC
Reel/Frame 074944/0730 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 21, 2022
From: SAMSUNG DISPLAY CO., LTD.
To: TCL CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
Reel/Frame 060778/0487 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 11, 2012
From: SAMSUNG ELECTRONICS CO., LTD.
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 029151/0055 →