IP Library Granted Patent US 8,604,873
Granted Patent B2
US 8,604,873 · App. 13/310,611 · Granted Dec 10, 2013

Ground partitioned power amplifier for stable operation

Inventors: Baker Scott (San Jose, CA); George Maxim (Milpitas, CA); Stephen Franck (Felton, CA); Chu Hsiung Ho (Milpitas, CA)
Assignee: RF Micro Devices (Cayman Islands), Ltd.
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Quick Facts
Patent No.
US 8,604,873
App. No.
13/310,611
Granted
Dec 10, 2013
Kind
B2
Abstract

Achievement of robust stability of a power amplifier (PA) that allows the sharing of the ground between the driver stages and the output stage is shown. A controlled amount of negative feedback is used to neutralize the local positive feedback that results from the driver-to-output stage ground sharing in the signal path, for example, a radio frequency (RF) signal path. The solution keeps a strong drive and a good performance of the PA. Exemplary embodiments are shown for the PA positive feedback neutralization. A first embodiment uses a ground signal divider while another embodiment uses a ground signal divider weighting technique.

Claims (22)

1. A power amplifier system comprising:

a signal path comprising a plurality of cascaded gain stages and an output stage the input of which is coupled to the output of the last gain stage of the plurality of cascaded gain stages, wherein at least one local positive feedback loop is created in the signal path by one or more shared ground connections between one or more of the plurality of cascaded gain stages and the output stage; and

a neutralizing feedback loop configured to control at least one negative feedback loop to balance the at least one local positive feedback loop.

2. The power amplifier system of claim 1 , wherein the signal path is a radio frequency signal path.

3. The power amplifier system of claim 1 , wherein the neutralizing feedback loop balances the at least one local positive feedback loop either partially or fully.

4. The power amplifier system of claim 1 , wherein the neutralizing feedback loop comprises at least one of: a passive element network, an active element network, and a hybrid of active and passive element networks.

5. The power amplifier system of claim 1 , wherein the neutralizing feedback loop comprises a ground signal divider.

6. The power amplifier system of claim 5 , wherein the ground signal divider is at least one of: an inductive divider, chain inductive divider, capacitive divider, chain capacitive divider, inductance-capacitance divider, chain inductance-capacitance divider, hybrid inductance-capacitance series/parallel network.

7. The power amplifier system of claim 5 , wherein the ground signal divider is a weighted ground signal divider.

8. The power amplifier system of claim 7 , wherein the weighted ground signal divider comprises at least one of: a split pre-driver stage and a weighted ground signal divider thereto, a split last driver stage and a weighted ground signal divider thereto.

9. The power amplifier system of claim 7 , wherein summation of a ground signal from the ground signal divider comprises one of: summation at the pre-driver output, summation at the last driver output, summation at the output stage of a cascode device source, summation at the power amplifier output after the output stage.

10. The power amplifier system of claim 9 , wherein summation comprises:

voltage mode signal summation, current mode signal summation, hybrid voltage and current signal summation.

11. A power amplifier system comprising:

a signal path having at least one local positive feedback loop present in the signal path, wherein the local positive feedback loop is created by one or more shared ground connections in the signal path; and

a neutralizing feedback loop configured to control at least one negative feedback loop to balance the at least one local positive feedback loop.

12. The power amplifier system of claim 11 , wherein the signal path is a radio frequency signal path.

13. A power amplifier system comprising:

a signal path comprising a plurality of cascaded gain stages and an output stage the input of which is coupled to the output of the last gain stage of the plurality of cascaded gain stages, wherein at least one local positive feedback loop is created in the signal path by one or more cascode devices in the output stage; and

a neutralizing feedback loop configured to control at least one negative feedback loop to balance the at least one local positive feedback loop.

14. The power amplifier system of claim 13 , wherein the at least one local positive feedback loop is created due to a parasitic capacitance associated with one or more of the cascode devices in the output stage.

15. The power amplifier system of claim 13 , wherein the neutralizing feedback loop comprises at least one of: a constant drain-to-gate capacitance coupled to one or more of the cascode devices in the output stage, an output voltage dependent drain-to-gate capacitance coupled to one or more of the cascode devices in the output stage, a load impedance dependent drain-to-gate capacitance coupled to one or more of the cascode devices in the output stage.

Assignments (4)
CHANGE OF NAME Recorded Jun 14, 2016
From: TRIQUINT INTERNATIONAL PTE. LTD.
To: QORVO INTERNATIONAL PTE. LTD.
Reel/Frame 038991/0899 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 6, 2016
From: RF MICRO DEVICES (CAYMAN ISLANDS), LTD.
To: TRIQUINT INTERNATIONAL PTE. LTD.
Reel/Frame 038485/0869 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 29, 2012
From: AMALFI SEMICONDUCTOR, INC.
To: RF MICRO DEVICES (CAYMAN ISLANDS), LTD.
Reel/Frame 029375/0148 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 2, 2012
From: SCOTT, BAKER; MAXIM, GEORGE; FRANCK, STEPHEN; HO, CHU HSIUNG
To: AMALFI SEMICONDUCTOR, INC.
Reel/Frame 028476/0943 →
Continuity (2)
Provisional Application 61419858 · Dec 5, 2010
Related Publication 20120139639A1 · Jun 7, 2012