IP Library Granted Patent US 8,530,964
Granted Patent B2
US 8,530,964 · App. 13/314,637 · Granted Sep 10, 2013

Semiconductor device including first and second semiconductor elements

Inventors: Franz Hirler (Isen, DE); Ulrich Glaser (Putzbrunn, DE); Christian Lenzhofer (Klagenfurt, AT)
Assignee: Infineon Technologies AG
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Quick Facts
Patent No.
US 8,530,964
App. No.
13/314,637
Granted
Sep 10, 2013
Kind
B2
Abstract

A semiconductor device includes a first semiconductor element including a first pn junction between a first terminal and a second terminal. The semiconductor device further includes a semiconductor element including a second pn junction between a third terminal and a fourth terminal. The semiconductor element further includes a semiconductor body including the first semiconductor element and the second semiconductor element monolithically integrated. The first and third terminals are electrically coupled to a first device terminal. The second and fourth terminals are electrically coupled to a second device terminal. A temperature coefficient α 1 of a breakdown voltage V br1 of the first pn junction and a temperature coefficient α 2 of a breakdown voltage V br2 of the second pn junction have a same algebraic sign and satisfy 0.6×α 1 <α 2 <1.1×α 1 at T=300 K, wherein V br2 <V br1 .

Claims (65)

1. A semiconductor device, comprising:

a first semiconductor element including a first pn junction between a first terminal and a second terminal;

a second semiconductor element including a second pn junction between a third terminal and a fourth terminal;

a semiconductor body including the first semiconductor element and the second semiconductor element monolithically integrated; and wherein

the first and third terminals are electrically coupled to a first device terminal;

the second and fourth terminals are electrically coupled to a second device terminal; and

a temperature coefficient α 1 of a breakdown voltage V br1 of the first pn junction and a temperature coefficient α 2 of a breakdown voltage V br2 of the second pn junction have a same algebraic sign and satisfy 0.6×α 1 <α 2 <1.1×α 1 at T=300K, wherein V br2 <V br1 .

2. The semiconductor device of claim 1 , wherein

the first semiconductor element is a trench field effect transistor cell and the first pn junction includes a first body region of a first conductivity type and a first drift region of a second conductivity type different from the first conductivity type;

the first body region adjoins a first trench structure at a first side of the first body region and the first body region adjoins a second trench structure at a second side of the first body region opposite to the first side;

the second semiconductor element is a sense cell and the second pn junction includes a second body region of the first conductivity type and a second drift region of the second conductivity type; and

the second body region adjoins a third trench structure at a first side of the second body region and the second body region adjoins a fourth trench structure at a second side of the second body region opposite to the first side.

3. The semiconductor device of claim 2 , wherein the second body region is electrically coupled to a gate electrode of at least one of the first and second trench structures.

4. The semiconductor device of claim 2 , wherein a difference between the first breakdown voltage V br1 of the first pn junction and the second breakdown voltage V br2 of the second pn junction is in a range between 50% to 600% of a threshold voltage of the trench field effect transistor.

5. The semiconductor device of claim 2 , wherein each one of the first and second trench structures includes a trench that is filled with an insulating material.

6. The semiconductor device of claim 2 , wherein a width of the first body region is larger than the width of the second body region.

7. The semiconductor device of claim 2 , wherein a width of the first body region is smaller than the width of the second body region.

8. The semiconductor device of claim 2 , wherein a depth of each one of the first and second trench structures is smaller than a depth of each one of the third and fourth trench structures.

9. The semiconductor device of claim 2 , wherein a width of each one of the first and second trench structures is smaller than a width of each one of the third and fourth trench structures.

10. The semiconductor device of claim 2 , wherein a depth of each one of the first and second trench structures is larger than a depth of each one of the third and fourth trench structures.

11. The semiconductor device of claim 2 , wherein a width of each one of the first and second trench structures is larger than a width of each one of the third and fourth trench structures.

12. The semiconductor device of claim 2 , further comprising a shielding region of the first conductivity type that is arranged within the drift region and adjoins a bottom side of each one of the third and fourth trench structures.

13. The semiconductor device of claim 2 , wherein a first distance between a bottom side of the first body region to a top side of the first body region at a surface of a semiconductor body of the first and second semiconductor elements is smaller than a second distance between a bottom side of the second body region to a top side of the second body region at the surface of the semiconductor body.

14. The semiconductor device of claim 2 , wherein

a trench field effect transistor cell array includes a first plurality of the field effect transistor cells;

a second plurality of the sense cells is spread over an area of the trench field effect transistor cell array; and

the first plurality is larger than the second plurality.

15. The semiconductor device of claim 2 , wherein

each one of the first and second trench structures includes a gate electrode and at least one field electrode that is arranged below the gate electrode; and further comprising

an electric insulator between the gate electrode and the at least one field electrode.

16. The semiconductor device of claim 1 , wherein

the first semiconductor element is a superjunction array cell and the first pn junction includes a first p-type pillar region and a first n-type pillar region;

the second semiconductor element is a superjunction sense cell and the second pn junction includes a second p-type pillar region and a second n-type pillar region; and wherein

the first and the second semiconductor elements differ in at least one of a lateral dimension of their p-type pillar region and their n-type pillar region.

17. The semiconductor device of claim 1 , wherein

the first semiconductor element is a transistor cell and the first pn junction includes a first body region of a first conductivity type and a first drift region of a second conductivity type different from the first conductivity type;

the second semiconductor element is a sense cell and the second pn junction includes a second body region of the first conductivity type and a second drift region of the second conductivity type; and wherein

a first distance between a bottom side of the first body region to a top side of the first body region at a surface of a semiconductor body of the first and second semiconductor elements is smaller than a second distance between a bottom side of the second body region to a top side of the second body region at the surface of the semiconductor body.

18. The semiconductor device of claim 1 , wherein

the first semiconductor element is a transistor cell and the first pn junction includes a first body region of a first conductivity type and a first drift region of a second conductivity type different from the first conductivity type;

the second semiconductor element is a sense cell and the second pn junction includes a second body region of the first conductivity type and a second drift region of the second conductivity type; and wherein

a width of the first body region differs from a width of the second body region.

19. The semiconductor device of claim 1 , wherein

the first semiconductor element is a first diode and the first pn junction includes a first anode region of a first conductivity type and a first cathode region of a second conductivity type different from the first conductivity type; and

the second semiconductor element is a second diode and the second pn junction includes a second anode region of the first conductivity type and a second cathode region of the second conductivity type.

20. The semiconductor device of claim 19 , further comprising

a transistor including a first load terminal, a second load terminal and a control terminal; and wherein

the first and second load terminals of the transistor and the first semiconductor element are connected in parallel.

21. The semiconductor device of claim 20 , wherein

the transistor is an n-type field effect transistor;

the first load terminal is a drain;

the second load terminal is a source;

the control terminal is a gate; and

the second anode region is electrically coupled to the gate.

22. The semiconductor device of claim 19 , wherein the first breakdown voltage V br1 of the first pn junction and the second breakdown voltage V br2 of the second pn junction satisfy 0<(V br1 −V br2 )/V br1 <0.2.

23. The semiconductor device of claim 19 , wherein

the first anode region includes a first p-type impurity and the second anode region includes the first p-type impurity; and

the first cathode region includes a first n-type impurity and the second cathode region includes the first n-type impurity; and wherein

a lateral concentration profile of at least one of the first p-type impurity in the first anode region, the first p-type impurity in the second anode region, the first n-type impurity in the first cathode region, and the first n-type impurity in the second cathode region is corrugated and includes maxima and minima.

24. The semiconductor device of claim 19 , wherein

the second semiconductor diode includes at least one of

a second p-type impurity in the second anode region that is absent in the first anode region, or

a second n-type impurity in the second cathode region that is absent in the first cathode region.

25. The semiconductor device of claim 19 , wherein

the first diode is an electrostatic discharge protection device including an anode area of at least 4000 μm 2 .

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 18, 2012
From: HIRLER, FRANZ; GLASER, ULRICH; LENZHOFER, CHRISTIAN
To: INFINEON TECHNOLOGIES AG
Reel/Frame 027549/0246 →
Continuity (1)
Related Publication 20130146970A1 · Jun 13, 2013