SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR
There is provided a semiconductor device including a semiconductor substrate ( 10 ), a high concentration diffusion region ( 22 ) formed within the semiconductor substrate ( 10 ), a first low concentration region ( 24 ) that has a lower impurity concentration than the high concentration diffusion region ( 22 ) and is provided under the high concentration diffusion region ( 22 ), and a bit line ( 30 ) that includes the high concentration diffusion region ( 22 ) and the first low concentration diffusion region ( 24 ) and serves as a source region and a drain region, and a manufacturing method therefor. Reduction of source-drain breakdown voltage of the transistor is suppressed, and a low-resistance bit line can be formed. Thus, a semiconductor device that can miniaturize memory cells and a manufacturing method therefor can be provided.
1 . A computer readable media comprising computer-executable instructions stored therein for fabricating a semiconductor device, the computer-executable instructions comprising:
instructions to form a high concentration diffusion region in a semiconductor substrate, the high concentration diffusion region being included in a source region and a drain region; and
instructions to form a first low concentration diffusion region under the high concentration diffusion region, the first low concentration diffusion region having a lower concentration than the high concentration region and included in the bit line.
2 . The computer readable media of claim 1 , further comprising instructions to form a mask layer over the semiconductor substrate, wherein each of the forming of the high concentration diffusion region and the forming of the first low concentration diffusion region includes instructions to implant ions in the semiconductor substrate by using the mask layer.
3 . The computer readable media of claim 2 , wherein an opening in the mask layer is expanded by ion implantation, and wherein the formation of the high concentration diffusion region is performed after the formation of the first low concentration diffusion region.
4 . The computer readable media of claim 3 , wherein the mask layer includes a photo resist layer.
5 . The computer readable media of claim 2 , wherein the mask layer includes a metal or insulator.
6 . The computer readable media of claim 1 further comprising instructions to form sidewalls at both sides of the mask layer, wherein:
the formation of the high concentration diffusion region implants ions in the semiconductor substrate by using the mask layer as a mask for ion implantation; and
the formation of the first low concentration diffusion region implants ions in the substrate by using the mask layer and the sidewalls as a mask for ion implantation.
7 . The computer readable media of claim 2 , further comprising instructions to form pocket ion implantation regions, at both sides of the high concentration diffusion region, by using the mask layer as a mask for pocket ion implantation, the pocket ion implantation regions included in the bit line.
8 . The computer readable media of claim 2 , further comprising instructions to form second low concentration diffusion regions at both sides of the high concentration diffusion region, the second low concentration diffusion regions having a lower concentration than the high concentration diffusion region and included in the bit line.
9 . The computer readable media of claim 1 further comprising:
instructions to form an ONO film on the semiconductor substrate; and
instructions to form a wide line on the ONO film, the wide line including a gate electrode.
10 . The computer readable media of claim 1 , wherein a width of the first low concentration region is less than a width of the high concentration diffusion region.
11 . The computer readable media of claim 1 , wherein a width of the first low concentration region is equal to a width of the high concentration diffusion region.