Mechanism for using a GPU controller for preloading caches
Provided is a method and system for preloading a cache on a graphical processing unit. The method includes receiving a command message, the command message including data related to a portion of memory. The method also includes interpreting the command message, identifying policy information of the cache, identifying a location and size of the portion of memory, and creating a fetch message including data related to contents of the portion, wherein the fetch message causes the cache to preload data of the portion of memory.
1. A system including an accelerated processing device electrically coupled to a cache, the system comprising:
a controller configured to:
receive a command message, the command message including instructions to be accessed during processing by the accelerated processing device, the instructions comprising data related to a portion of a plurality of portions of memory;
interpret the command message by determining whether or not the command message includes a preloading instruction to preload, to the cache, the portion of the memory to be accessed;
on the condition that the command message is determined to include the preloading instruction, determine to preload, to the cache, at least the portion of the memory;
on the condition that command message is determined to not include the preloading instruction, compare the instructions of the command message to cache access history and determine to preload, to the cache, at least the portion of the memory based on a comparison of the command message to the cache access history;
determine which of the plurality of portions of the memory to preload to the cache based on at least one of: (i) locality reference information and (ii) policy information of the cache;
create a fetch message including data related to contents of the portion; and
output the fetch message to the cache.
2. The system of claim 1 , further comprising:
a host processor configured to output the command message including data related to the portion of the memory.
3. The system of claim 1 , wherein
the policy information determines:
how the portion of the memory to be preloaded is stored in the cache; and
when a block in the cache is written, either (1) read only or (2) read and write, and
the fetch message causes the cache to load the data from the portion of the memory based on the policy information.
4. The system of claim 1 , wherein the command message includes the locality reference information.
5. The system of claim 1 , wherein the locality reference information is based on a temporal locality of the portion of the memory.
6. The system of claim 1 , wherein the locality reference information is based on a spatial locality of the portion of the memory.
7. The system of claim 1 , wherein the controller is further configured to interpret the command message by determining whether or not the command message includes a preloading instruction having a physical address for each portion of the memory.
8. The system of claim 1 , wherein the controller is further configured to interpret the command message by determining whether or not the command message includes a preloading instruction having a virtual address for the portion of the memory.
9. The system of claim 8 , wherein the controller is further configured to translate the virtual address into a physical address for the portion of the memory.
10. A computer implemented method for preloading a cache, comprising:
receiving a command message, the command message including instructions to be accessed during processing by an accelerated processing device, the instructions comprising data related to a portion of a plurality of portions of memory;
interpreting the command message by determining whether or not the command message includes a preloading instruction to preload, to the cache, the portion of the memory to be accessed;
on the condition that the command message is determined to include the preloading instruction, determine to preload, to the cache, at least the portion of the memory;
on the condition that command message is determined to not include the preloading instruction, compare the instructions of the command message to cache access history and determine to preload, to the cache, at least the portion of the memory based on a comparison of the command message to the cache access history;
determining which of the plurality of portions of the memory to preload to the cache based on at least one of: (i) identified locality reference information and (ii) identified policy information of the cache
creating a fetch message including data related to contents of the portion; and
sending the fetch message to the cache.
11. The method of claim 10 , wherein
the policy information determines:
how the portion of the memory to be preloaded is stored in the cache; and
when a block in the cache is written, either (1) read only or (2) read and write, and
the fetch message causes the cache to load data from the portion of the memory.
12. The method of claim 10 , wherein the command message includes the locality reference information.
13. The method of claim 10 , wherein the locality of reference information is based on a temporal locality of the portion of the memory.
14. The method of claim 10 , wherein the locality of reference information is based on a spatial locality of the portion of the memory.
15. The method of claim 10 , wherein interpreting the command message further includes determining whether or not the command message includes a preloading instruction having a virtual address for the portion of the memory.
16. The method of claim 15 , further comprising:
translating the virtual address into a physical address for the portion of the memory.
17. The method of claim 10 , wherein interpreting the command message further includes determining whether or not the command message includes a preloading instruction having a physical address for the portion of the memory.