IP Library Granted Patent US 8,694,701
Granted Patent B2
US 8,694,701 · App. 13/326,354 · Granted Apr 8, 2014

Recovering dropped instructions in a network interface controller

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Quick Facts
Patent No.
US 8,694,701
App. No.
13/326,354
Granted
Apr 8, 2014
Kind
B2
Abstract

A method for operating a peripheral device includes receiving at the peripheral device service orders, which are identified with respective service instances and are submitted to the peripheral device over the bus by software applications running on a host processor, which write copies of the service orders to a memory. The received service orders are queued for execution by the peripheral device. When one or more of the service orders have been dropped from the queue prior to execution, a recovery of a selected service instance is initiated by submitting a read request from the peripheral device to the memory over the bus to receive a copy of any unexecuted service order associated with the service instance.

Claims (31)

1. A method for operating a peripheral device, which is connected to a host processor and a memory by a bus, the method comprising:

receiving at the peripheral device service orders, which are identified with respective service instances and are submitted to the peripheral device over the bus by software applications running on the host processor, which write copies of the service orders to the memory;

queuing the received service orders in a queue for execution by the peripheral device;

when one or more of the service orders have been dropped from the queue prior to execution, initiating a recovery of a selected service instance by submitting a read request from the peripheral device to the memory over the bus to receive a copy of any unexecuted service order that is identified with the service instance; and

upon receiving at the peripheral device a new service order that is identified with the selected service instance and reaches the peripheral device before the peripheral device receives a response to the read request, executing the new service order and ignoring the response when it is received.

2. The method according to claim 1 , wherein receiving the service orders comprise receiving entries written by the applications to a doorbell register at an address on the bus that is assigned to the peripheral device.

3. The method according to claim 1 , wherein the software applications submit the service orders by posting a write operation to the bus, and wherein the bus operates in accordance with a protocol that causes posted writes to be flushed from the bus to the peripheral device before delivering read responses.

4. The method according to claim 1 , further comprising executing the service orders on a given service instance by reading into the peripheral device a context of the given service instance from the memory, and applying the context in performing an operation indicated by the service order.

5. The method according to claim 4 , wherein the peripheral device has no dedicated memory for storing the context after the operation has been completed.

6. The method according to claim 1 , further comprising setting a flag in the peripheral device to indicate that the one or more of the service orders have been dropped, and wherein initiating the recovery comprises reading and resetting the flag to initiate the recovery.

7. The method according to claim 6 , wherein the flag is one of an array of flags in the peripheral device, and each flag causes the peripheral device to initiate the recovery of a corresponding set of the service instances.

8. The method according to claim 1 , wherein initiating the recovery comprises making a record of the service instances that are in recovery, and wherein ignoring the response comprises checking the record to determine that the service instance is in recovery, and discarding the response responsively to the record.

9. The method according to claim 1 , wherein the peripheral device comprises an input/output (I/O) device, and wherein the execution of the service orders causes the I/O device to transfer data to and from the memory.

10. The method according to claim 9 , wherein the I/O device comprises a network interface controller (NIC), and wherein the service instances comprise queue pairs, which are respectively assigned to the software applications for use in communicating over a network via the NIC.

11. The method according to claim 9 , wherein the service orders indicate descriptors comprising direct memory access (DMA) instructions for execution by the peripheral device.

12. The method according to claim 9 , wherein the service orders cause the peripheral device to arm a completion queue in the memory in order to trigger an event upon posting of a new completion queue entry to the armed completion queue.

13. A computer peripheral device, comprising:

a host interface, which is configured to be connected to a bus, which is coupled to a host processor and a memory, and is configured to receive over the bus service orders, which are identified with respective service instances and are submitted by software applications running on the host processor, which write copies of the service orders to the memory; and

processing circuitry, which is configured to queue the received service orders in a queue for execution, and when one or more of the service orders are dropped from the queue prior to execution, to initiate a recovery of a selected service instance by submitting a read request via the host interface to the memory over the bus to receive a copy of any unexecuted service order that is identified with the service instance,

wherein the processing circuitry is configured, upon receiving via the host interface a new service order that is identified with the selected service instance and reaches the peripheral device before the processing circuitry receives a response to the read request, to execute the new service order and ignore the response when it is received.

14. The apparatus according to claim 13 , wherein the service orders comprise entries written by the applications to a doorbell register at an address on the bus that is assigned to the peripheral device.

15. The apparatus according to claim 13 , wherein the software applications submit the service orders by posting a write operation to the bus, and wherein the bus operates in accordance with a protocol that causes posted writes to be flushed from the bus to the peripheral device before delivering read responses.

16. The apparatus according to claim 13 , wherein the processing circuitry is configured to execute the service orders on a given service instance by reading into the peripheral device a context of the given service instance from the memory, and applying the context in performing an operation indicated by the service order.

17. The apparatus according to claim 16 , wherein the peripheral device has no dedicated memory for storing the context after the operation has been completed.

18. The apparatus according to claim 13 , wherein the processing circuitry is configured to set a flag in the peripheral device to indicate that the one or more of the service orders have been dropped, and to read and reset the flag in order to initiate the recovery.

19. The apparatus according to claim 18 , wherein the flag is one of an array of flags in the peripheral device, and each flag causes the processing circuitry to initiate the recovery of a corresponding set of the service instances.

20. The apparatus according to claim 13 , wherein the processing circuitry is configured to make a record of the service instances that are in recovery, to check the record to determine that the service instance is in recovery, and to discard the response responsively to the record.

21. The apparatus according to claim 13 , wherein the peripheral device comprises an input/output (I/O) device, and wherein the execution of the service orders causes the processing circuitry to transfer data to and from the memory.

22. The apparatus according to claim 21 , wherein the I/O device comprises a network interface controller (NIC), and wherein the service instances comprise queue pairs, which are respectively assigned to the software applications for use in communicating over a network via the NIC.

23. The apparatus according to claim 22 , wherein the service orders indicate descriptors comprising direct memory access (DMA) instructions for execution by the peripheral device.

24. The apparatus according to claim 22 , wherein the service orders cause the processing circuitry to arm a completion queue in the memory, and to trigger an event upon posting of a new completion queue entry to the armed completion queue.

Assignments (3)
RELEASE OF SECURITY INTEREST IN PATENT COLLATERAL AT REEL/FRAME NO. 37900/0720 Recorded Jul 13, 2018
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: MELLANOX TECHNOLOGIES, LTD.
Reel/Frame 046542/0792 →
PATENT SECURITY AGREEMENT Recorded Feb 24, 2016
From: MELLANOX TECHNOLOGIES, LTD.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 037900/0720 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 15, 2011
From: SHAHAR, ARIEL; CHAPMAN, HILLEL; AIBESTER, ROI
To: MELLANOX TECHNOLOGIES LTD.
Reel/Frame 027392/0095 →