IP Library Granted Patent US 8,441,866
Granted Patent B2
US 8,441,866 · App. 13/327,364 · Granted May 14, 2013

Method for programming a floating gate

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Quick Facts
Patent No.
US 8,441,866
App. No.
13/327,364
Granted
May 14, 2013
Kind
B2
Abstract

The invention provides methods for programming a floating gate. A floating gate tunneling device is used with an analog comparing device in a circuit having a floating reference node and an offset-mitigating feedback loop for iteratively programming a floating gate, or multiple floating gates.

Claims (14)

1. A method for programming a floating gate circuit comprising the steps of:

using a tunneling device and a floating reference node for programming an output with an offset-mitigating feedback loop.

2. The method of claim 1 comprising further steps for monitoring the output of the circuit, and based on a comparison of the output with a preselected tolerance threshold, selectably reiterating the step of using a tunneling device and a floating reference node for programming the output.

3. The method of claim 1 further comprising the steps of:

in a circuit having an analog comparing device operably coupled with a tunneling device, adding charge to a floating gate of the tunneling device and applying a signal to a first analog comparing device input such that a first analog comparing device input signal becomes equal with a second analog comparing device input reference signal; and

operating the analog comparing device in a unity gain mode such that the output of the circuit is substantially equal to the reference signal.

4. The method of claim 1 adapted to the use of voltage signals.

5. The method of claim 1 adapted to the use of current signals.

6. The method of claim 1 further comprising the step of adding charge to the floating gate by inducing Fowler-Nordheim tunneling.

7. The method of claim 1 further comprising the step of adding charge to the floating gate by inducing Channel-Hot-Carrier tunneling.

8. The method of claim 1 further comprising the step of erasing the floating gate by raising the voltage at the tunneling device to a level at which charge escapes from the floating gate.

9. The method of claim 1 further comprising the step of:

using the output of the analog comparing device for programming a plurality of floating gates.

10. The method of claim 1 further comprising the step of using the output in an electronic system.

Assignments (4)
ASSIGNMENT OF PATENT SECURITY INTEREST PREVIOUSLY RECORDED AT REEL/FRAME (040646/0799) Recorded Feb 17, 2023
From: HSBC BANK USA, NATIONAL ASSOCIATION, AS RESIGNING AGENT
To: JPMORGAN CHASE BANK, N.A., AS SUCCESSOR AGENT
Reel/Frame 062781/0544 →
SECURITY INTEREST Recorded Nov 17, 2016
From: SEMTECH CORPORATION; SEMTECH NEW YORK CORPORATION; SIERRA MONOLITHICS, INC.; SEMTECH EV, INC.; TRIUNE SYSTEMS, L.L.C.; TRIUNE IP, LLC
To: HSBC BANK USA, NATIONAL ASSOCIATION, AS ADMINISTRATIVE AGENT
Reel/Frame 040646/0799 →
SECURITY INTEREST Recorded May 28, 2015
From: TRIUNE IP, LLC
To: HSBC BANK USA, NATIONAL ASSOCIATION
Reel/Frame 035732/0326 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 4, 2013
From: TEGGATZ, ROSS E.; CHEN, WAYNE T.; BLACKALL, ERIC; SMITH, BRETT
To: TRIUNE IP LLC
Reel/Frame 030152/0136 →