IP Library Granted Patent US 9,024,356
Granted Patent B2
US 9,024,356 · App. 13/331,970 · Granted May 5, 2015

Compound semiconductor device with buried field plate

Inventors: Gilberto Curatola (Villach, AT); Oliver Häberlen (Villach, AT)
Assignee: Infineon Technologies Austria AG
H01L29/402H01L29/42316
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,024,356
App. No.
13/331,970
Granted
May 5, 2015
Kind
B2
Abstract

A semiconductor device includes a first compound semiconductor material and a second compound semiconductor material on the first compound semiconductor material. The second compound semiconductor material comprises a different material than the first compound semiconductor material such that the first compound semiconductor material has a two-dimensional electron gas (2DEG). The semiconductor device further includes a buried field plate disposed in the first compound semiconductor material and electrically connected to a terminal of the semiconductor device. The 2DEG is interposed between the buried field plate and the second compound semiconductor material.

Claims (23)

1. A semiconductor device, comprising:

a first compound semiconductor material;

a second compound semiconductor material on the first compound semiconductor material, the second compound semiconductor material comprising a different material than the first compound semiconductor material such that the first compound semiconductor material has a two-dimensional electron gas (2DEG); and

a buried field plate disposed in the first compound semiconductor material and electrically connected to a terminal of the semiconductor device, the 2DEG being interposed between the buried field plate and the second compound semiconductor material,

wherein the buried field plate lowers maximum electric field peaks and enhances breakdown strength of the semiconductor device.

2. The semiconductor device according to claim 1 , wherein the buried field plate comprises the same material as the second compound semiconductor material.

3. The semiconductor device according to claim 2 , wherein the buried field plate and the second compound semiconductor material each comprise AlGaN.

4. The semiconductor device according to claim 1 , wherein the buried field plate comprises InGaN.

5. The semiconductor device according to claim 1 , wherein the buried field plate comprises a more highly doped region of the first compound semiconductor material surrounded by a less highly doped region of the first compound semiconductor material.

6. The semiconductor device according to claim 1 , further comprising:

a gate region over the 2DEG;

a source region extending through the second compound semiconductor material to the first compound semiconductor material and in contact with the buried field plate; and

a drain region extending through the second compound semiconductor material to the first compound semiconductor material and spaced apart from the source region and the buried field plate.

7. The semiconductor device according to claim 6 , wherein a distance between the buried field plate and the 2DEG is greater than a distance between the gate region and the 2DEG.

8. The semiconductor device according to claim 6 , wherein the buried field plate extends laterally from the source region toward the drain region further than the gate region.

9. The semiconductor device according to claim 6 , wherein the buried field plate and the source region comprise doped regions of the same doping type.

10. The semiconductor device according to claim 6 , further comprising at least one additional buried field plate disposed in the first compound semiconductor material below the 2DEG and in contact with the source region, adjacent ones of the buried field plates being spaced apart from one another by a region of the first compound semiconductor material.

11. The semiconductor device according to claim 10 , wherein the source region extends deeper into the first compound semiconductor material than the drain region.

12. The semiconductor device according to claim 10 , wherein a second one of the buried field plates is spaced further away from the second compound semiconductor material than a first one of the buried field plates, and laterally extends further from the source region toward the drain region than the first one of the buried field plates.

13. The semiconductor device according to claim 6 , wherein a distance between the buried field plate and the 2DEG increases in a direction laterally extending from the source region to the drain region.

14. The semiconductor device according to claim 1 , further comprising a second 2DEG in the first compound semiconductor material and spaced further apart from the second compound semiconductor material than the first 2DEG, and wherein the buried field plate is interposed between the first and second 2DEGs.

15. The semiconductor device according to claim 14 , wherein the first 2DEG extends laterally from a source region of the semiconductor device to a drain region of the semiconductor device and forms a channel of the semiconductor device, and the second 2DEG extends laterally from the source region toward the drain region and terminates before reaching the drain region.

16. The semiconductor device according to claim 1 , further comprising a two-dimensional hole gas (2DHG) in the first compound semiconductor material and spaced further apart from the second compound semiconductor material than the 2DEG, and wherein the buried field plate is interposed between the 2DEG and the 2DHG.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 20, 2011
From: CURATOLA, GILBERTO; HAEBERLEN, OLIVER
To: INFINEON TECHNOLOGIES AUSTRIA AG
Reel/Frame 027423/0123 →
Continuity (1)
Related Publication 20130153967A1 · Jun 20, 2013