Memory training results corresponding to a plurality of memory modules
View Patent ↗Methods, apparatuses, and computer program products for improving memory training results corresponding to a plurality of memory modules are provided. Embodiments include detecting a hardware configuration change upon initiating a boot sequence of a system that includes the plurality of memory modules; generating for a plurality of training iterations, reference training values corresponding to aligning of a data strobe (DQS) signal with a data valid window of data (DQ) lines of the plurality of memory modules; identifying for each training iteration, any outer values within the reference training values generated for that training iteration; eliminating the identified outer values from the reference training values; generating a final reference training value based on an average of the remaining reference training values; and using the final reference training value as the DQ-DQS timing value for the boot sequence of the system.
1. A method of improving memory training results corresponding to a plurality of memory modules, the method comprising:
detecting, by a training controller, a hardware configuration change upon initiating a boot sequence of a system that includes the plurality of memory modules;
generating for a plurality of training iterations, by the training controller, reference training values corresponding to aligning of a data strobe (DQS) signal with a data valid window of data (DQ) lines of the plurality of memory modules;
identifying for each training iteration, by the training controller, any outer values within the reference training values generated for that training iteration;
eliminating, by the training controller, the identified outer values from the reference training values;
generating, by the training controller, a final reference training value based on an average of the remaining reference training values; and
using, by the training controller, the final reference training value as the DQ-DQS timing value for the boot sequence of the system.
2. The method of claim 1 further comprising:
generating, by the training controller, training values upon initiation of a subsequent boot sequence;
determining, by the training controller, whether the training values are within acceptable limits of the final reference training value;
if the training values are within the acceptable limits, using, by the training controller, the final reference training value as the DQ-DQS timing value in the subsequent boot sequence; and
if the training values are not within the acceptable limits, using, by the training controller, an average of the training values as the DQ-DQS timing value in the subsequent boot sequence.
3. The method of claim 1 further comprising:
generating, by the training controller, training values upon initiation of a subsequent boot sequence;
determining, by the training controller, whether the training values are within acceptable limits of the final reference training value;
if the training values are within the acceptable limits, continuing to generate, by the training controller, the training values until the training values are within the acceptable limits; and
if the training values are not within the acceptable limits, using, by the training controller, an average of the training values as the DQ-DQS timing value in the subsequent boot sequence.
4. The method of claim 1 wherein identifying for each training iteration, by the training controller, outer values within the reference training values includes:
identifying low outer values that are less than a predetermined minimum value; and
identifying high outer values that are greater than a predetermined maximum value.
5. The method of claim 1 further comprising for each training iteration, changing, by the training controller, a fan speed corresponding to cooling of one or more components of the system that includes the plurality of memory modules.
6. The method of claim 1 further comprising for each training iteration, changing, by the training controller, a direct current cycle loop of the system that includes the plurality of memory modules.
7. An apparatus for improving memory training results corresponding to a plurality of memory modules, the apparatus comprising a computer processor, a computer memory operatively coupled to the computer processor, the computer memory having disposed within it computer program instructions that when executed cause the apparatus to carry out the steps of:
detecting, by a training controller, a hardware configuration change upon initiating a boot sequence of a system that includes the plurality of memory modules;
generating for a plurality of training iterations, by the training controller, reference training values corresponding to aligning of a data strobe (DQS) signal with a data valid window of data (DQ) lines of the plurality of memory modules;
identifying for each training iteration, by the training controller, any outer values within the reference training values generated for that training iteration;
eliminating, by the training controller, the identified outer values from the reference training values;
generating, by the training controller, a final reference training value based on an average of the remaining reference training values; and
using, by the training controller, the final reference training value as the DQ-DQS timing value for the boot sequence of the system.
8. The apparatus of claim 7 further comprising computer program instructions that when executed cause the apparatus to carry out the steps of:
generating, by the training controller, training values upon initiation of a subsequent boot sequence;
determining, by the training controller, whether the training values are within acceptable limits of the final reference training value;
if the training values are within the acceptable limits, using, by the training controller, the final reference training value as the DQ-DQS timing value; and
if the training values are not within the acceptable limits, using, by the training controller, an average of the training values as the DQ-DQS timing value.
9. The apparatus of claim 7 further comprising computer program instructions that when executed cause the apparatus to carry out the steps of:
generating, by the training controller, training values upon initiation of a subsequent boot sequence;
determining, by the training controller, whether the training values are within acceptable limits of the final reference training value;
if the training values are within the acceptable limits, continuing to generate, by the training controller, the training values until the training values are within the acceptable limits; and
if the training values are not within the acceptable limits, using, by the training controller, an average of the training values as the DQ-DQS timing value.
10. The apparatus of claim 7 wherein identifying for each training iteration, by the training controller, outer values within the reference training values includes:
identifying low outer values that are less than a predetermined minimum value; and
identifying high outer values that are greater than a predetermined maximum value.
11. The apparatus of claim 7 further comprising computer program instructions that when executed cause the apparatus to carry out the steps of for each training iteration, changing, by the training controller, a fan speed corresponding to cooling of one or more components of the system that includes the plurality of memory modules.
12. The apparatus of claim 7 further comprising computer program instructions that when executed cause the apparatus to carry out the steps of for each training iteration, changing, by the training controller, a direct current cycle loop of the system that includes the plurality of memory modules.
13. A computer program product for improving memory training results corresponding to a plurality of memory modules, the computer program product disposed upon a non-transitory computer readable medium, the computer program product comprising computer program instructions capable, when executed, of causing a computer to carry out the steps of:
detecting, by a training controller, a hardware configuration change upon initiating a boot sequence of a system that includes the plurality of memory modules;
generating for a plurality of training iterations, by the training controller, reference training values corresponding to aligning of a data strobe (DQS) signal with a data valid window of data (DQ) lines of the plurality of memory modules;
identifying for each training iteration, by the training controller, any outer values within the reference training values generated for that training iteration;
eliminating, by the training controller, the identified outer values from the reference training values;
generating, by the training controller, a final reference training value based on an average of the remaining reference training values; and
using, by the training controller, the final reference training value as the DQ-DQS timing value for the boot sequence of the system.
14. The computer program product of claim 13 further comprising computer program instructions capable, when executed, of causing a computer to carry out the steps of:
generating, by the training controller, training values upon initiation of a subsequent boot sequence;
determining, by the training controller, whether the training values are within acceptable limits of the final reference training value;
if the training values are within the acceptable limits, using, by the training controller, the final reference training value as the DQ-DQS timing value; and
if the training values are not within the acceptable limits, using, by the training controller, an average of the training values as the DQ-DQS timing value.
15. The computer program product of claim 13 further comprising computer program instructions capable, when executed, of causing a computer to carry out the steps of:
generating, by the training controller, training values upon initiation of a subsequent boot sequence;
determining, by the training controller, whether the training values are within acceptable limits of the final reference training value;
if the training values are within the acceptable limits, continuing to generate, by the training controller, the training values until the training values are within the acceptable limits; and
if the training values are not within the acceptable limits, using, by the training controller, an average of the training values as the DQ-DQS timing value.
16. The computer program product of claim 13 wherein identifying for each training iteration, by the training controller, outer values within the reference training values includes:
identifying low outer values that are less than a predetermined minimum value; and
identifying high outer values that are greater than a predetermined maximum value.
17. The computer program product of claim 13 further comprising computer program instructions capable, when executed, of causing a computer to carry out the steps of for each training iteration, changing, by the training controller, a fan speed corresponding to cooling of one or more components of the system that includes the plurality of memory modules.
18. The computer program product of claim 13 further comprising computer program instructions capable, when executed, of causing a computer to carry out the steps of for each training iteration, changing, by the training controller, a direct current cycle loop of the system that includes the plurality of memory modules.
19. The computer program product of claim 13 wherein the computer readable medium is a storage medium.