Programmable gate III-nitride power transistor
View Patent ↗A III-nitride semiconductor device which includes a charged floating gate electrode.
1. A programmable III-Nitride power transistor comprising:
a first III-nitride semiconductor body;
a second III-nitride semiconductor body situated over said first III-nitride semiconductor body to form a two dimensional electron gas;
a passivation layer situated over said second III-nitride semiconductor body;
a gate arrangement disposed over said second III-nitride semiconductor body, said gate arrangement including a non-volatile floating gate situated in a trench within said passivation layer, and a gate electrode situated over said non-volatile floating gate and electrically insulated from said non-volatile floating gate by an insulation spacer in said trench, said non-volatile floating gate configured for programming said III-Nitride power transistor by a current produced in said two dimensional electron gas.
2. The programmable III-Nitride power transistor of claim 1 , wherein a threshold voltage of said programmable III-Nitride power transistor is programmed by said current produced in said two dimensional electron gas.
3. The programmable III-Nitride power transistor of claim 1 further comprising first and second power electrodes coupled to said second III-nitride semiconductor body.
4. The programmable III-Nitride power transistor of claim 1 , wherein said first III-nitride semiconductor body comprises GaN and wherein said second III-nitride semiconductor body comprises AlGaN.
5. The programmable III-Nitride power transistor of claim 1 further comprising a gate insulation body disposed between said non-volatile floating gate and said second III-nitride semiconductor body.
6. The programmable III-Nitride power transistor of claim 5 , wherein said gate insulation body comprises silicon nitride.
7. The programmable III-Nitride power transistor of claim 1 , wherein said non-volatile floating gate is charged to interrupt said two dimensional electron gas.
8. The programmable III-Nitride power transistor of claim 1 further comprising a silicon substrate.
9. The programmable III-Nitride power transistor of claim 1 further comprising a silicon carbide substrate.
10. The programmable III-Nitride power transistor of claim 1 further comprising a sapphire substrate.
11. The programmable III-Nitride power transistor of claim 1 , wherein said non-volatile floating gate is negatively charged.
12. The programmable III-Nitride power transistor of claim 1 , wherein said non-volatile floating gate electrode is rechargeable.
13. A method of fabricating a programmable III-Nitride power transistor, said method comprising:
disposing a first III-nitride semiconductor body over a second III-nitride semiconductor body to form a two dimensional electron gas;
forming a gate insulation body over said second III-nitride semiconductor body;
forming a non-volatile floating gate over said gate insulation body, said non-volatile floating gate situated in a trench within a passivation layer;
disposing a gate electrode over said non-volatile floating gate and electrically insulated from said non-volatile floating gate by an insulation spacer in said trench;
charging said non-volatile floating gate by a current produced in said two dimensional electron gas to obtain a non-volatile charged floating gate electrode.
14. The method of claim 13 , wherein said charging said non-volatile floating gate programs a threshold voltage of said programmable III-Nitride power transistor.
15. The method of claim 13 further comprising disposing first and second power electrodes on said second III-nitride semiconductor body.
16. The method of claim 13 , wherein said first III-nitride semiconductor body comprises GaN and wherein said second III-nitride semiconductor body comprises AlGaN.
17. The method of claim 13 , wherein said gate insulation body comprises silicon nitride.
18. The method of claim 13 , wherein said non-volatile charged floating gate electrode interrupts said two dimensional electron gas.
19. The method of claim 13 , wherein said charging said non-volatile floating gate comprises using a tunneling method.
20. The method of claim 13 , wherein said charging said non-volatile floating gate comprises using hot electron injection.