IP Library Granted Patent US 9,287,209
Granted Patent B2
US 9,287,209 · App. 13/338,492 · Granted Mar 15, 2016

Metal finger capacitor for high-K metal gate processes

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Quick Facts
Patent No.
US 9,287,209
App. No.
13/338,492
Granted
Mar 15, 2016
Kind
B2
Abstract

Embodiments described herein provide a structure for finger capacitors, and more specifically metal-oxide-metal (“MOM”) finger capacitors and arrays of finger capacitors. A plurality of Shallow Trench Isolation (STI) formations is associated with every other column of capacitor fingers, with poly fill formations covering the STI formations to provide a more robust and efficient structure.

Claims (47)

1. A finger capacitor, comprising:

a substrate;

a plurality of shallow trench isolation (STI) formations formed in the substrate;

a plurality of poly fill formations, each poly fill formation covering a respective STI formation;

a plurality of columns including a first set of metal fingers intertwined with a second set of metal fingers;

a cathode block connected to the first set of metal fingers; and

an anode block connected to the second set of metal fingers, wherein

the plurality of STI formations are aligned at a substantially constant pitch such that consecutive ones of the plurality of STI formations overlap with every other column from among the plurality of columns, the overlap being in a direction perpendicular to a top surface of the substrate, and wherein remaining columns from among the plurality of columns do not overlap with the plurality of STI formations in the direction perpendicular to the top surface of the substrate, and

a first metal finger of the first set of metal fingers and a first metal finger of the second set of metal fingers of the every other column from among the plurality of columns are directly aligned with a poly fill formation of the plurality of poly fill formations in the direction perpendicular to the top surface of the substrate.

2. The finger capacitor of claim 1 , wherein each poly fill formation forms a metal gate or a high resistance gate.

3. The finger capacitor of claim 1 , further comprising a dielectric between adjacent metal fingers from among the first set of metal fingers and the second set of metal fingers.

4. The finger capacitor of claim 3 , wherein the dielectric is doped silicon glass or low-K dielectric.

5. The finger capacitor of claim 1 , further comprising:

at least three columns of dummy fingers disposed along an edge of the finger capacitor.

6. The finger capacitor of claim 5 , wherein the dummy fingers are connected to the cathode block.

7. The finger capacitor of claim 6 , further comprising:

a plurality of vias that connect the dummy fingers in a direction perpendicular to a direction of extension of the dummy fingers.

8. The finger capacitor of claim 7 , wherein the plurality of vias connect the dummy fingers in every other column from among the at least three columns of dummy fingers.

9. A finger capacitor array comprising:

a plurality of finger capacitors, at least one or more of the plurality of finger capacitors comprising:

a substrate;

a plurality of shallow trench isolation (STI) formations formed in the substrate;

a plurality of poly fill formations;

a plurality of columns including a first set of metal fingers intertwined with a second set of metal fingers;

a respective cathode block connected to the first set of metal fingers; and

a respective anode block connected to the second set of metal fingers, wherein the plurality of STI formations are aligned at a substantially constant pitch such that consecutive ones of the plurality of STI formations overlap with every other column from among the plurality of columns, the overlap being in a direction perpendicular to a top surface of the substrate, and wherein remaining columns from among the plurality of columns do not overlap with the plurality of STI formations in the direction perpendicular to the top surface of the substrate, and

a first metal finger of the first set of metal fingers and a first metal finger of the second set of metal fingers of the every other column from among the plurality of columns are directly aligned with a poly fill formation of the plurality of poly fill formations in the direction perpendicular to the top surface of the substrate.

10. The finger capacitor array of claim 9 , wherein each poly fill formation forms a metal gate or a high resistance gate.

11. The finger capacitor array of claim 9 , the at least one or more of the plurality of finger capacitors further comprising a dielectric between adjacent metal fingers from among the first set of metal fingers and the second set of metal fingers.

12. The finger capacitor array of claim 11 , wherein the dielectric is doped silicon glass or low-K dielectric.

13. The finger capacitor array of claim 9 , each respective one of the at least one or more of the plurality of finger capacitors further comprising at least three columns of dummy fingers disposed along an edge of the respective finger capacitor.

14. The finger capacitor array of claim 13 , wherein the dummy fingers are connected to the respective cathode block.

15. The finger capacitor array of claim 14 , wherein each finger capacitor of the one or more of the plurality of finger capacitors further comprises:

a plurality of vias that connect the dummy fingers in a direction perpendicular to a direction of extension of the dummy fingers.

16. The finger capacitor array of claim 15 , wherein the plurality of vias connect the dummy fingers in every other column from among the at least three columns of dummy fingers.

17. The finger capacitor array of claim 9 , wherein the at least one or more of the plurality of finger capacitors comprises at least two or more of the plurality of finger capacitors.

18. A finger capacitor, comprising:

a substrate;

a plurality of shallow trench isolation (STI) formations formed in the substrate;

a plurality of poly fill formations, each poly fill formation covering a respective STI formation, and wherein at least one of the poly fill formations of the plurality of poly fill formations is electrically floating;

a plurality of columns including a first set of metal fingers intertwined with a second set of metal fingers;

a cathode block connected to the first set of metal fingers; and

an anode block connected to the second set of metal fingers, wherein

the plurality of STI formations are aligned at a substantially constant pitch such that consecutive ones of the plurality of STI formations overlap with every other column from among the plurality of columns, the overlap being in a direction perpendicular to a top surface of the substrate, and wherein remaining columns from among the plurality of columns do not overlap with the plurality of STI formations in the direction perpendicular to the top surface of the substrate, and

a first metal finger of the first set of metal fingers and a first metal finger of the second set of metal fingers of the every other column from among the plurality of columns are directly aligned with a poly fill formation of the plurality of poly fill formations in the direction perpendicular to the top surface of the substrate.

19. The finger capacitor of claim 18 , wherein each poly fill formation forms a metal gate or a high resistance gate.

20. The finger capacitor of claim 18 , further comprising a dielectric between adjacent metal fingers from among the first set of metal fingers and the second set of metal fingers.

Assignments (7)
CORRECTIVE ASSIGNMENT TO CORRECT THE PATENT NUMBER 9,385,856 TO 9,385,756 PREVIOUSLY RECORDED AT REEL: 47349 FRAME: 001. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 22, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 051144/0648 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE PREVIOUSLY RECORDED ON REEL 047229 FRAME 0408. ASSIGNOR(S) HEREBY CONFIRMS THE THE EFFECTIVE DATE IS 09/05/2018. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047349/0001 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047229/0408 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 28, 2011
From: WOO, AGNES NEVES; TRAN, PASCAL; ITO, AKIRA; SHIAU, GUANG-JYE; LU, CHAO-YANG
To: BROADCOM CORPORATION
Reel/Frame 027452/0342 →